From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753820AbdGCJf4 (ORCPT ); Mon, 3 Jul 2017 05:35:56 -0400 Received: from mail-io0-f182.google.com ([209.85.223.182]:34188 "EHLO mail-io0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753656AbdGCJfv (ORCPT ); Mon, 3 Jul 2017 05:35:51 -0400 MIME-Version: 1.0 In-Reply-To: <20170702231811.GJ18324@bhelgaas-glaptop.roam.corp.google.com> References: <987fac41-80dc-f1d0-ec0b-91ae57b91bfd@sigmadesigns.com> <20170702231811.GJ18324@bhelgaas-glaptop.roam.corp.google.com> From: Ard Biesheuvel Date: Mon, 3 Jul 2017 10:35:50 +0100 Message-ID: Subject: Re: [PATCH v9 2/3] PCI: Add tango PCIe host bridge support To: Bjorn Helgaas Cc: Marc Gonzalez , Mason , Marc Zyngier , linux-pci , Thibaud Cornic , LKML , Thomas Gleixner , Linux ARM Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 3 July 2017 at 00:18, Bjorn Helgaas wrote: > On Tue, Jun 20, 2017 at 10:17:40AM +0200, Marc Gonzalez wrote: >> This driver is required to work around several hardware bugs >> in the PCIe controller. >> >> NB: Revision 1 does not support legacy interrupts, or IO space. > > I had to apply these manually because of conflicts in Kconfig and > Makefile. What are these based on? Easiest for me is if you base > them on the current -rc1 tag. > >> Signed-off-by: Marc Gonzalez >> --- >> drivers/pci/host/Kconfig | 8 +++ >> drivers/pci/host/Makefile | 1 + >> drivers/pci/host/pcie-tango.c | 164 ++++++++++++++++++++++++++++++++++++++++++ >> include/linux/pci_ids.h | 2 + >> 4 files changed, 175 insertions(+) >> create mode 100644 drivers/pci/host/pcie-tango.c >> [..] >> + /* >> + * QUIRK #2 >> + * Unfortunately, config and mem spaces are muxed. >> + * Linux does not support such a setting, since drivers are free >> + * to access mem space directly, at any time. >> + * Therefore, we can only PRAY that config and mem space accesses >> + * NEVER occur concurrently. >> + */ >> + writel_relaxed(1, pcie->mux); >> + ret = pci_generic_config_read(bus, devfn, where, size, val); >> + writel_relaxed(0, pcie->mux); > > I'm very hesitant about this. When people stress this, we're going to > get reports of data corruption. Even with the disclaimer below, I > don't feel good about this. Adding the driver is an implicit claim > that we support the device, but we know it can't be made reliable. > I noticed that the Synopsys driver suffers from a similar issue: in dw_pcie_rd_other_conf(), it happily reprograms the outbound I/O window to perform a config space access, and switches it back to I/O space afterwards (unless it has more than 2 viewports, in which case it uses dedicated windows for I/O space and config space)