From: Andy Lutomirski <luto@amacapital.net>
To: Kees Cook <keescook@chromium.org>
Cc: palmer@sifive.com, linux-riscv@lists.infradead.org,
aou@eecs.berkeley.edu, Paul Moore <paul@paul-moore.com>,
Eric Paris <eparis@redhat.com>, Will Drewry <wad@chromium.org>,
wesley@sifive.com, David Howells <dhowells@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
pombredanne@nexb.com, Greg KH <gregkh@linuxfoundation.org>,
kstewart@linuxfoundation.org, LKML <linux-kernel@vger.kernel.org>,
linux-audit@redhat.com, david.abdurachmanov@gmail.com
Subject: Re: [PATCH 2/2] RISC-V: Add support for SECCOMP
Date: Thu, 25 Oct 2018 14:02:20 -0700 [thread overview]
Message-ID: <CALCETrUSvugnh1JiLgn49c4_dw6F8bXiO52jdqiAKEn-CgzoXA@mail.gmail.com> (raw)
In-Reply-To: <CAGXu5jJ7gmVXZE+iksW99c6bHEV2rSOG+boQDRGmMSDa9HOh_A@mail.gmail.com>
On Wed, Oct 24, 2018 at 2:42 PM Kees Cook <keescook@chromium.org> wrote:
>
> On Wed, Oct 24, 2018 at 1:40 PM, Palmer Dabbelt <palmer@sifive.com> wrote:
> > From: "Wesley W. Terpstra" <wesley@sifive.com>
> >
> > This is a fairly straight-forward implementation of seccomp for RISC-V
> > systems.
> >
> > Signed-off-by: Wesley W. Terpstra <wesley@sifive.com>
> > Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
> > ---
> > arch/riscv/Kconfig | 18 ++++++++++++++++++
> > arch/riscv/include/asm/seccomp.h | 10 ++++++++++
> > arch/riscv/include/asm/syscall.h | 6 ++++++
> > arch/riscv/include/asm/thread_info.h | 1 +
> > include/uapi/linux/audit.h | 1 +
> > 5 files changed, 36 insertions(+)
> > create mode 100644 arch/riscv/include/asm/seccomp.h
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index a344980287a5..28abe47602a1 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -28,6 +28,7 @@ config RISCV
> > select GENERIC_STRNLEN_USER
> > select GENERIC_SMP_IDLE_THREAD
> > select GENERIC_ATOMIC64 if !64BIT || !RISCV_ISA_A
> > + select HAVE_ARCH_SECCOMP_FILTER
>
> I think this patch is missing most of the actual seccomp glue?
>
> config HAVE_ARCH_SECCOMP_FILTER
> bool
> help
> An arch should select this symbol if it provides all of these things:
> - syscall_get_arch()
> - syscall_get_arguments()
> - syscall_rollback()
> - syscall_set_return_value()
> - SIGSYS siginfo_t support
> - secure_computing is called from a ptrace_event()-safe context
> - secure_computing return value is checked and a return value of -1
> results in the system call being skipped immediately.
> - seccomp syscall wired up
>
> I only see syscall_get_arch(). Nothing is using TIF_SECCOMP (I'd
> expect a masked check in entry.S -- it seems like tracepoints are
> getting missed too? I see it handled in ptrace.c but not checked in
> entry.S?) There's no checking for seccomp in ptrace.c, etc.
Hi RISC-V people:
I strongly, strongly suggest that you rewrite your asm to work the way
that x86's does: have a function called prepare_exit_to_usermode() and
make it work more or less like x86's. Doing all the exit work in asm
like you are is just setting you up for a world of pain.
--Andy
next prev parent reply other threads:[~2018-10-25 21:02 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CAEn-LTqbEmWovu4t7Rs4C211+GRRU4V3B=+WmW0SOhX_b8db5Q@mail.gmail.com>
2018-10-24 20:40 ` [PATCH 0/2] " Palmer Dabbelt
2018-10-24 20:40 ` [PATCH 1/2] Move EM_RISCV into elf-em.h Palmer Dabbelt
2018-10-24 21:26 ` Kees Cook
2018-10-27 7:46 ` Christoph Hellwig
2018-10-27 9:10 ` David Abdurachmanov
2018-10-24 20:40 ` [PATCH 2/2] RISC-V: Add support for SECCOMP Palmer Dabbelt
2018-10-24 21:42 ` Kees Cook
2018-10-24 22:34 ` Kees Cook
2018-10-25 21:02 ` Andy Lutomirski [this message]
2018-10-27 6:07 ` Palmer Dabbelt
2018-10-25 18:31 ` David Abdurachmanov
2018-10-25 20:36 ` Paul Moore
2018-10-28 11:07 ` David Abdurachmanov
2018-10-29 20:27 ` Palmer Dabbelt
2018-11-02 13:32 ` David Abdurachmanov
2018-11-02 15:51 ` Kees Cook
2018-10-27 6:07 ` Palmer Dabbelt
2018-10-27 7:55 ` Christoph Hellwig
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