From: Andy Lutomirski <luto@amacapital.net>
To: Jan Beulich <jbeulich@suse.com>
Cc: Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>,
"H. Peter Anvin" <hpa@zytor.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 0/2] x86-64: allow using RIP-relative addressing for per-CPU data
Date: Wed, 5 Nov 2014 09:15:28 -0800 [thread overview]
Message-ID: <CALCETrUh4ghZ9dx4qqjQYGzdhajauX_8UYL+VdopJjTXskTMrw@mail.gmail.com> (raw)
In-Reply-To: <545A59D002000078000C1057@mail.emea.novell.com>
On Wed, Nov 5, 2014 at 9:09 AM, Jan Beulich <jbeulich@suse.com> wrote:
>>>> Andy Lutomirski <luto@amacapital.net> 11/04/14 8:33 PM >>>
>>On 11/04/2014 12:49 AM, Jan Beulich wrote:
>>> Observing that per-CPU data (in the SMP case) is reachable by
>>> exploiting 64-bit address wraparound, these two patches
>>> arrange for using the one byte shorter RIP-relative addressing
>>> forms for the majority of per-CPU accesses.
>>>
>>> 1: handle PC-relative relocations on per-CPU data
>>> 2: use RIP-relative addressing for most per-CPU accesses
>>>
>>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>>>
>>
>>I'm lost here. Can you give an example of a physical and virtual
>>address of an instruction, the address within the gs segment, and why
>>the relocations are backwards?
>
> When an instruction using RIP relative addressing gets moved up in
> address space, the distance to the target address decreases. I.e. it's the
> opposite of a normal, non-PC-relative base relocation (where the target
> address increases together with the instruction getting moved up).
>
Duh. Thanks :)
--Andy
prev parent reply other threads:[~2014-11-05 17:16 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-04 8:49 [PATCH 0/2] x86-64: allow using RIP-relative addressing for per-CPU data Jan Beulich
2014-11-04 19:33 ` Andy Lutomirski
2014-11-05 17:09 ` Jan Beulich
2014-11-05 17:15 ` Andy Lutomirski [this message]
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