From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_DKIMWL_WL_HIGH autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11F72C43218 for ; Mon, 10 Jun 2019 19:56:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D65C621783 for ; Mon, 10 Jun 2019 19:56:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1560196564; bh=BSrEs7k4Eaj+qfKqbXB7x6RBjqYairyQB7xlNqEmonI=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=N2Gj0+1T71OseFfEsy9NMJ+APHDkA2xV+WTejY1X+MS5JXeRoEumZiY+iltGWK2k5 s8/uQtZkub9KqHzn7ZLEWbjtCsjFKe+8d2Lzb0zYZyXjV5c9RFKixJOPdfJ/SoION9 PS/HwGgkE0T/BzoolQs9Toi22bYOS14EdCXLvmvg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389465AbfFJT4D (ORCPT ); Mon, 10 Jun 2019 15:56:03 -0400 Received: from mail.kernel.org ([198.145.29.99]:34002 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389255AbfFJT4D (ORCPT ); Mon, 10 Jun 2019 15:56:03 -0400 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0A653212F5 for ; Mon, 10 Jun 2019 19:56:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1560196562; bh=BSrEs7k4Eaj+qfKqbXB7x6RBjqYairyQB7xlNqEmonI=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=uLzHkUDAQ8jOsA8YXnkz0O3Qklab8tzkEtYYWwVgKRQkiQKzSqsdLapdzrorKdIKK n6Eo4HwM27qI73UXdMC+Vo7aJo27Dlu5OTlBwsHayFksgsHw2rZwNM92HHc08myrfM frywWd5NERvhfQ373QnY3PfJ7m2L8vxY6KRo3fOE= Received: by mail-wm1-f42.google.com with SMTP id g135so538845wme.4 for ; Mon, 10 Jun 2019 12:56:01 -0700 (PDT) X-Gm-Message-State: APjAAAUsE7VesxAJWHwnBuF2IQ7lhvoRnnHC71d6eOmAlukOWmqR2YFF ahr3nfFP95880ltaZys0VZN/XKob5czAh8OdR5kCBQ== X-Google-Smtp-Source: APXvYqzM9tcFDkfc5EcsyyIB59pCxk2ffDwv+KGOuXFY/1fKRXVVJv6PtkR8yujMk0ZblpfWuwOhhYeBeaPhDe6KICk= X-Received: by 2002:a7b:cd84:: with SMTP id y4mr14984047wmj.79.1560196560570; Mon, 10 Jun 2019 12:56:00 -0700 (PDT) MIME-Version: 1.0 References: <20190606200926.4029-1-yu-cheng.yu@intel.com> <20190606200926.4029-4-yu-cheng.yu@intel.com> <20190607080832.GT3419@hirez.programming.kicks-ass.net> <20190607174336.GM3436@hirez.programming.kicks-ass.net> <34E0D316-552A-401C-ABAA-5584B5BC98C5@amacapital.net> <7e0b97bf1fbe6ff20653a8e4e147c6285cc5552d.camel@intel.com> <25281DB3-FCE4-40C2-BADB-B3B05C5F8DD3@amacapital.net> <3f19582d-78b1-5849-ffd0-53e8ca747c0d@intel.com> <5aa98999b1343f34828414b74261201886ec4591.camel@intel.com> <0665416d-9999-b394-df17-f2a5e1408130@intel.com> In-Reply-To: <0665416d-9999-b394-df17-f2a5e1408130@intel.com> From: Andy Lutomirski Date: Mon, 10 Jun 2019 12:55:48 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v7 03/14] x86/cet/ibt: Add IBT legacy code bitmap setup function To: Dave Hansen Cc: Yu-cheng Yu , Peter Zijlstra , X86 ML , "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , LKML , "open list:DOCUMENTATION" , Linux-MM , linux-arch , Linux API , Arnd Bergmann , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jun 10, 2019 at 12:52 PM Dave Hansen wrote: > > On 6/10/19 12:38 PM, Yu-cheng Yu wrote: > >>> When an application starts, its highest stack address is determined. > >>> It uses that as the maximum the bitmap needs to cover. > >> Huh, I didn't think we ran code from the stack. ;) > >> > >> Especially given the way that we implemented the new 5-level-paging > >> address space, I don't think that expecting code to be below the stack > >> is a good universal expectation. > > Yes, you make a good point. However, allowing the application manage the bitmap > > is the most efficient and flexible. If the loader finds a legacy lib is beyond > > the bitmap can cover, it can deal with the problem by moving the lib to a lower > > address; or re-allocate the bitmap. > > How could the loader reallocate the bitmap and coordinate with other > users of the bitmap? > > > If the loader cannot allocate a big bitmap to cover all 5-level > > address space (the bitmap will be large), it can put all legacy lib's > > at lower address. We cannot do these easily in the kernel. > > This is actually an argument to do it in the kernel. The kernel can > always allocate the virtual space however it wants, no matter how large. > If we hide the bitmap behind a kernel API then we can put it at high > 5-level user addresses because we also don't have to worry about the > high bits confusing userspace. > That's a fairly compelling argument. The bitmap is one bit per page, right? So it's smaller than the address space by a factor of 8*2^12 == 2^15. This means that, if we ever get full 64-bit linear addresses reserved entirely for userspace (which could happen if my perennial request to Intel to split user and kernel addresses completely happens), then we'll need 2^48 bytes for the bitmap, which simply does not fit in the address space of a legacy application.