From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752152AbbKJXog (ORCPT ); Tue, 10 Nov 2015 18:44:36 -0500 Received: from mail-ob0-f181.google.com ([209.85.214.181]:35749 "EHLO mail-ob0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751123AbbKJXob (ORCPT ); Tue, 10 Nov 2015 18:44:31 -0500 MIME-Version: 1.0 In-Reply-To: <1447194427.31884.100.camel@kernel.crashing.org> References: <20151109133624-mutt-send-email-mst@redhat.com> <1447109937.31884.42.camel@kernel.crashing.org> <1447121076.31884.61.camel@kernel.crashing.org> <1447133316.31884.67.camel@kernel.crashing.org> <1447151874.31884.82.camel@kernel.crashing.org> <1447194427.31884.100.camel@kernel.crashing.org> From: Andy Lutomirski Date: Tue, 10 Nov 2015 15:44:10 -0800 Message-ID: Subject: Re: [PATCH v4 0/6] virtio core DMA API conversion To: Benjamin Herrenschmidt Cc: Christian Borntraeger , Paolo Bonzini , David Woodhouse , Martin Schwidefsky , "Michael S. Tsirkin" , Sebastian Ott , "David S. Miller" , linux-s390 , Cornelia Huck , Joerg Roedel , KVM , Christoph Hellwig , Linux Virtualization , "linux-kernel@vger.kernel.org" , sparclinux@vger.kernel.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Nov 10, 2015 at 2:27 PM, Benjamin Herrenschmidt wrote: > On Tue, 2015-11-10 at 10:54 -0800, Andy Lutomirski wrote: >> >> Does that work on powerpc on existing kernels? >> >> Anyway, here's another crazy idea: make the quirk assume that the >> IOMMU is bypasses if and only if the weak barriers bit is set on >> systems that are missing the new DT binding. > > "New DT bindings" doesn't mean much ... how do we change DT bindings on > existing machines with a FW in flash ? > > What about partition <-> partition virtio such as what we could do on > PAPR systems. That would have the weak barrier bit. > Is it partition <-> partition, bypassing IOMMU? I think I'd settle for just something that doesn't regress non-experimental setups that actually work today and that allow new setups (x86 with fixed QEMU and maybe something more complicated on powerpc and/or sparc) to work in all cases. We could certainly just make powerpc and sparc continue bypassing the IOMMU until someone comes up with a way to fix it. I'll send out some patches that do that, and maybe that'll help this make progress. --Andy