From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S1753288AbdKNCaa (ORCPT <rfc822;w@1wt.eu>);
        Mon, 13 Nov 2017 21:30:30 -0500
Received: from mail.kernel.org ([198.145.29.99]:58060 "EHLO mail.kernel.org"
        rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP
        id S1751171AbdKNCa3 (ORCPT <rfc822;linux-kernel@vger.kernel.org>);
        Mon, 13 Nov 2017 21:30:29 -0500
DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C03C22192A
Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org
Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=luto@kernel.org
X-Google-Smtp-Source: AGs4zMYQOf4sDakn1Wh741nCFhohZSBRBez14McfsN22IHTFmsveNvXVeVLMSHYFJguyYlEprvlxn+cDE9jIzHELXIg=
MIME-Version: 1.0
In-Reply-To: <CA+55aFy1oxA-vMyvh7Z+vt3paj-XHkYbc8qU2vSFxOiATmrMjA@mail.gmail.com>
References: <cover.1510371795.git.luto@kernel.org> <5b424fefa9230917995d0584b40bc539a9bd9224.1510371795.git.luto@kernel.org>
 <3e2bdf66-cbd4-4e78-ead1-e5c99d2a6d08@intel.com> <CA+55aFzVWuVzzsTnhQu5H8kkUjVvsGuiqqqsMx6Pp0sqK=Mcsw@mail.gmail.com>
 <CALCETrWDYxZPFT=N6N3Ukci_xEU3OHS+0tajihuf+03j=0paoQ@mail.gmail.com> <CA+55aFy1oxA-vMyvh7Z+vt3paj-XHkYbc8qU2vSFxOiATmrMjA@mail.gmail.com>
From: Andy Lutomirski <luto@kernel.org>
Date: Mon, 13 Nov 2017 18:30:07 -0800
X-Gmail-Original-Message-ID: <CALCETrWozKE0nHWiyF_V4UU7hr_TWS2AFLbOJ15ZZqQYhCG8NA@mail.gmail.com>
Message-ID: <CALCETrWozKE0nHWiyF_V4UU7hr_TWS2AFLbOJ15ZZqQYhCG8NA@mail.gmail.com>
Subject: Re: [RFC 6/7] x86/asm: Remap the TSS into the cpu entry area
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>, Dave Hansen <dave.hansen@intel.com>,
        X86 ML <x86@kernel.org>, Borislav Petkov <bpetkov@suse.de>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Brian Gerst <brgerst@gmail.com>
Content-Type: text/plain; charset="UTF-8"
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Mon, Nov 13, 2017 at 6:28 PM, Linus Torvalds
<torvalds@linux-foundation.org> wrote:
> On Mon, Nov 13, 2017 at 6:25 PM, Andy Lutomirski <luto@kernel.org> wrote:
>> On Mon, Nov 13, 2017 at 11:36 AM, Linus Torvalds
>> <torvalds@linux-foundation.org> wrote:
>>>
>>> I forget what the actual size is, but aligning the hardware TSS struct
>>> to 128 bytes might be sufficient. It's not that big.
>>
>> 104 bytes, so it's probably already fine.  For anything except an
>> actual task switch, only the first 12 or so bytes matter.
>
> Note that historically, about half of the Intel errata (that don't get
> fixed) are about TSS in oddball situations, mainly page crossers.
>
> I may be exaggerating just a tiny bit, but it's definitely a "don't do it".

:)

I suspect the major case where this matters is when we do a task
switch, which only ever happens on 32-bit double faults, at which
point we're already seriously screwed.  But yes, I agree.