From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 672A2C433E1 for ; Tue, 7 Jul 2020 16:36:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 43B7C2064C for ; Tue, 7 Jul 2020 16:36:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1594139790; bh=RmLIslKrDtxB6F53triYZpBcRENGA9EGTlNzCsVjwi4=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=SLeM3DanVN/ApRxe1qqpyNv3GaMdzCoYhhMMwxp7CGCd7DkQ/EZQ7Z9HuWaUpYp0S RYkua3EiBy/pgTWSWLzsy4VhFL+laX5PIwm4t9VIHoN8yFIasvTkqsV9YsP444AoYy /4SIjg6ZTDYklofq5Xj7p4hEhxz7X5ESjWl9fRk0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728428AbgGGQg3 (ORCPT ); Tue, 7 Jul 2020 12:36:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:41652 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726911AbgGGQg2 (ORCPT ); Tue, 7 Jul 2020 12:36:28 -0400 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A939B2082F for ; Tue, 7 Jul 2020 16:36:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1594139787; bh=RmLIslKrDtxB6F53triYZpBcRENGA9EGTlNzCsVjwi4=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=EH7/dWwsAAWGZGyRMmMVipyNihGhxO/DXLd2ANh9jGS4oOA78A8b2Iw9dm0pEDH6O guuUttkpSUD+TJLAoG43Xq+uZ4SadmGdRJLDEc+V/9Hm1GMUz9EjZY6y2GWqJuR2Cp qR3Kn79BvnYtZd5A8ZIEKN9XB/O8ou0HfaQqE1E8= Received: by mail-wm1-f53.google.com with SMTP id l17so43992990wmj.0 for ; Tue, 07 Jul 2020 09:36:27 -0700 (PDT) X-Gm-Message-State: AOAM530SvcuV/ClmMaRqkouP/yTOCrygzNkfg5WmRmdBS0DkQCdOzSte X+nz7uvp6P39K8zKQSD5GfUjFrAK9GSsEXUr8ZnmIw== X-Google-Smtp-Source: ABdhPJxzCYljEmsDTswMYA+4TmFU6jf7ILq+qh6U+Xg6w8bhrCGvZ0DT0rMAXl9KS6OEgNTrGBBCC0jH+zF2tPIfGx4= X-Received: by 2002:a7b:c09a:: with SMTP id r26mr4989979wmh.176.1594139786159; Tue, 07 Jul 2020 09:36:26 -0700 (PDT) MIME-Version: 1.0 References: <1594088183-7187-1-git-send-email-cathy.zhang@intel.com> <1594088183-7187-2-git-send-email-cathy.zhang@intel.com> In-Reply-To: <1594088183-7187-2-git-send-email-cathy.zhang@intel.com> From: Andy Lutomirski Date: Tue, 7 Jul 2020 09:36:15 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 1/4] x86/cpufeatures: Add enumeration for SERIALIZE instruction To: Cathy Zhang Cc: kvm list , LKML , X86 ML , Paolo Bonzini , "Christopherson, Sean J" , Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Ricardo Neri , Kyung Min Park , Josh Poimboeuf , Greg KH , Andi Kleen , Dave Hansen , Tony Luck , "Ravi V. Shankar" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jul 6, 2020 at 7:21 PM Cathy Zhang wrote: > > This instruction gives software a way to force the processor to complete > all modifications to flags, registers and memory from previous instructions > and drain all buffered writes to memory before the next instruction is > fetched and executed. > > The same effect can be obtained using the cpuid instruction. However, > cpuid causes modification on the eax, ebx, ecx, and ecx regiters; it > also causes a VM exit. > > A processor supports SERIALIZE instruction if CPUID.0x0x.0x0:EDX[14] is > present. The CPU feature flag is shown as "serialize" in /proc/cpuinfo. > > Detailed information on the instructions and CPUID feature flag SERIALIZE > can be found in the latest Intel Architecture Instruction Set Extensions > and Future Features Programming Reference and Intel 64 and IA-32 > Architectures Software Developer's Manual. Can you also wire this up so sync_core() uses it? Thanks, Andy