Re: [PATCH] power: reset: at91-reset: enable I-cache for at91sam9260_reset

From: Jonas Danielsson <jonas@orbital-systems.com>
To: alexander.stein@systec-electronic.com
Cc: Claudiu.Beznea@microchip.com, linux-kernel@vger.kernel.org,
	Sebastian Reichel <sre@kernel.org>,
	Nicolas Ferre <Nicolas.Ferre@microchip.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] power: reset: at91-reset: enable I-cache for at91sam9260_reset
Date: Wed, 17 Oct 2018 14:17:14 +0200	[thread overview]
Message-ID: <CALDOjzhZg3X1y22KE1yw_0ZFjuvaa=3GhEF2iU=KUk6-eRZN2g@mail.gmail.com> (raw)
In-Reply-To: <2351196.3BzoFE0xYq@ws-140106>

On Tue, Oct 16, 2018 at 4:52 PM Alexander Stein
<alexander.stein@systec-electronic.com> wrote:
>
> On Tuesday, October 16, 2018, 3:30:24 PM CEST Claudiu.Beznea@microchip.com wrote:
> > Hi Jonas,
> >
> > On 07.10.2018 15:57, Jonas Danielsson wrote:
> > > From: Jonas Danielsson <jonas@orbital-systems.com>
> > >
> > > This fixes a bug where our embedded system (AT91SAM9260 based) would
> > > hang at reboot. At the most we managed 16 boot loops without a hang.
> > >
> > > With this patch applied the problem has not been observed and the board
> > > has managed above 250 boot loops.
> > >
> > > The AT91SAM9260 datasheet tells us that with the instruction cache
> > > disabled all instructions are fetched from SDRAM. And we have an errata
> > > telling us we must power down the SDRAM before issuing cpu reset.
> > >
> > > This means we need the instruction cache enabled in at91sam9260_reset()
> > > At the moment it is being disabled in cpu_proc_fin() which is called from
> > > arch/arm/kernel/reboot.c.
> >
> > Are you using kexec reboot or implemented hibernate mode on this machine?
> > I'm seeing cpu_proc_fin() is called only in case of kexec reboot or
> > switching to hibernate mode.
> >
> > In case of normal reboot (e.g. reboot command) machine_restart() from
> > arch/arm/kernel/reboot.c is called. Please correct me if I'm wrong.
>
> Another location is cpu_reset() aka cpu_arm926_reset() in proc-arm926.S
> which also disables I-cache. But I can't track down a callstack
> ending there.
>

We take the normal path of sys_reboot => kernel_restart => machine_restart ...

I added code to print the c1 register in different paths. And I-cache
is enabled.
So now I am really confused about why the patch worked.

> Best regards,
> Alexander

Jonas

>
>
>

-- 

JONAS DANIELSSON
Software Developer

+46 72 361 5022
Malmö - Sweden

ORBITAL SYSTEMS
orbital-systems.com

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