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From: Jim Mattson <jmattson@google.com>
To: Luwei Kang <luwei.kang@intel.com>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Sean Christopherson" <sean.j.christopherson@intel.com>,
	"Vitaly Kuznetsov" <vkuznets@redhat.com>,
	"Wanpeng Li" <wanpengli@tencent.com>,
	"Joerg Roedel" <joro@8bytes.org>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"H . Peter Anvin" <hpa@zytor.com>,
	"the arch/x86 maintainers" <x86@kernel.org>,
	"Andi Kleen" <ak@linux.intel.com>,
	"kvm list" <kvm@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	"Stephane Eranian" <eranian@google.com>
Subject: Re: [RFC v1 1/9] KVM: x86: Add base address parameter for get_fixed_pmc function
Date: Thu, 29 Aug 2019 12:01:34 -0700	[thread overview]
Message-ID: <CALMp9eS0-OfAR1=mrvABrOg85V+-yM64KuOff3A1_wCKDYZNxw@mail.gmail.com> (raw)
In-Reply-To: <1567056849-14608-2-git-send-email-luwei.kang@intel.com>

On Wed, Aug 28, 2019 at 10:38 PM Luwei Kang <luwei.kang@intel.com> wrote:
>
> PEBS output Inte PT introduces some new MSRs (MSR_RELOAD_FIXED_CTRx)
> for fixed function counters that use for autoload the preset value
> after writing out a PEBS event.
>
> Introduce base MSRs address parameter to make this function can get
> performance monitor counter structure by MSR_RELOAD_FIXED_CTRx registers.
>
> Signed-off-by: Luwei Kang <luwei.kang@intel.com>
> ---
>  arch/x86/kvm/pmu.h           |  5 ++---
>  arch/x86/kvm/vmx/pmu_intel.c | 14 +++++++++-----
>  2 files changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/kvm/pmu.h b/arch/x86/kvm/pmu.h
> index 58265f7..c62a1ff 100644
> --- a/arch/x86/kvm/pmu.h
> +++ b/arch/x86/kvm/pmu.h
> @@ -93,10 +93,9 @@ static inline struct kvm_pmc *get_gp_pmc(struct kvm_pmu *pmu, u32 msr,
>  }
>
>  /* returns fixed PMC with the specified MSR */
> -static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr)
> +static inline struct kvm_pmc *get_fixed_pmc(struct kvm_pmu *pmu, u32 msr,
> +                                                               int base)
>  {
> -       int base = MSR_CORE_PERF_FIXED_CTR0;
> -
>         if (msr >= base && msr < base + pmu->nr_arch_fixed_counters)
>                 return &pmu->fixed_counters[msr - base];

IIUC, these new MSRs aren't new fixed PMCs, but are values to be
reloaded into the existing fixed PMCs when a PEBS event has been
written. This change makes it look like you are introducing an
additional set of fixed PMCs.

  reply	other threads:[~2019-08-29 19:01 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-29  5:34 [RFC v1 0/9] PEBS enabling in KVM guest Luwei Kang
2019-08-29  5:34 ` [RFC v1 1/9] KVM: x86: Add base address parameter for get_fixed_pmc function Luwei Kang
2019-08-29 19:01   ` Jim Mattson [this message]
2019-08-30  0:01     ` Kang, Luwei
2019-08-29 21:10   ` Andi Kleen
2019-08-30  0:15     ` Kang, Luwei
2019-08-29  5:34 ` [RFC v1 2/9] KVM: x86: PEBS via Intel PT HW feature detection Luwei Kang
2019-08-29  5:34 ` [RFC v1 3/9] KVM: x86: Implement MSR_IA32_PEBS_ENABLE read/write emulation Luwei Kang
2019-08-29 21:20   ` Andi Kleen
2019-08-30  0:22     ` Kang, Luwei
2019-08-29  5:34 ` [RFC v1 4/9] KVM: x86: Implement counter reload MSRs " Luwei Kang
2019-08-29  5:34 ` [RFC v1 5/9] KVM: x86: Allocate performance counter for PEBS event Luwei Kang
2019-08-29  5:34 ` [RFC v1 6/9] KVM: x86: Add shadow value of PEBS status Luwei Kang
2019-08-29  5:34 ` [RFC v1 7/9] KVM: X86: Expose PDCM cpuid to guest Luwei Kang
2019-08-29  5:34 ` [RFC v1 8/9] KVM: X86: MSR_IA32_PERF_CAPABILITIES MSR emulation Luwei Kang
2019-08-29  5:34 ` [RFC v1 9/9] KVM: x86: Expose PEBS feature to guest Luwei Kang
2019-08-29  7:28 ` [RFC v1 0/9] PEBS enabling in KVM guest Peter Zijlstra
2019-08-29  8:11   ` Kang, Luwei

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