From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12D32C433F5 for ; Wed, 30 Mar 2022 22:15:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351491AbiC3WQw (ORCPT ); Wed, 30 Mar 2022 18:16:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237444AbiC3WQt (ORCPT ); Wed, 30 Mar 2022 18:16:49 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1D4024080 for ; Wed, 30 Mar 2022 15:15:03 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 1E7B0B81C23 for ; Wed, 30 Mar 2022 22:15:02 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D522AC3410F for ; Wed, 30 Mar 2022 22:15:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1648678500; bh=+MqfinD5zpbYCPYjVIreefTaBYjg2GrTn2WA/RLrRfE=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=s+mwTw03AIB2SoALqqAjJYslntDVPesHGpEvc+T0Y1Cg0pBY8jfcDqVvmSf1GfTBK le/e2srLdYGheSlA6r3zCd5Tr8a8v0bSWcJeOfL4a1eBfNUfmsusQo2OiZi7EVyPeu VeoLFjEMDAHY9chvVhHdbvskMstmpNPdY+Tpmd9vfsgyUOr2XPDJAPoEZmPIolAp0V vKKZ68dtQxPTgyOQvMJvnzMfm5xChyLo48wDcmBX3ZVsPWwu+XzZK1zQ2QLIP5Sk5V 3zBhsK/3vZIftswnKVWZC+5rum9VpX7wlErn+v3ogVuqF6wi8sfrfWT8dz/bD4gsOZ Bi5NvPWml4rKQ== Received: by mail-il1-f179.google.com with SMTP id b9so15483917ila.8 for ; Wed, 30 Mar 2022 15:15:00 -0700 (PDT) X-Gm-Message-State: AOAM5311PNX/z7wPrXUqvGwL6lZJzFoL5wrv4MUDvmw5CQJkYgwEXUKW ZuOs771fdfwXPSnZEx9FyU2vh4jrLYVotPJCag== X-Google-Smtp-Source: ABdhPJymzYUK41vhjgTa/TKwyst/6S3q9rqOqMl3Fumu9XyEkiOIcoX+B76c2345o9s2VCiE10FD3Hzar0LuCGUqIYM= X-Received: by 2002:a92:cd8c:0:b0:2c7:e86b:5139 with SMTP id r12-20020a92cd8c000000b002c7e86b5139mr12789911ilb.144.1648678499961; Wed, 30 Mar 2022 15:14:59 -0700 (PDT) MIME-Version: 1.0 References: <20220311101940.3403607-1-tarumizu.kohei@fujitsu.com> <20220311101940.3403607-6-tarumizu.kohei@fujitsu.com> In-Reply-To: <20220311101940.3403607-6-tarumizu.kohei@fujitsu.com> From: Rob Herring Date: Wed, 30 Mar 2022 17:14:49 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 5/8] arm64: Create cache sysfs directory without ACPI PPTT for hardware prefetch control To: Kohei Tarumizu Cc: Catalin Marinas , Will Deacon , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , X86 ML , "H. Peter Anvin" , linux-arm-kernel , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 11, 2022 at 4:23 AM Kohei Tarumizu wrote: > > This patch create a cache sysfs directory without ACPI PPTT if the > CONFIG_HWPF_CONTROL is true. > > Hardware prefetch control driver need cache sysfs directory and cache > level/type information. In ARM processor, these information can be > obtained from the register even without PPTT. What registers? CCSIDR register is no longer used. You must use DT or PPTT. > Therefore, we set the > cpu_map_populated to true to create cache sysfs directory if the > machine doesn't have PPTT. > > Signed-off-by: Kohei Tarumizu > --- > arch/arm64/kernel/cacheinfo.c | 29 +++++++++++++++++++++++++++++ > 1 file changed, 29 insertions(+)