From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934444AbdBVT2G convert rfc822-to-8bit (ORCPT ); Wed, 22 Feb 2017 14:28:06 -0500 Received: from mail.kernel.org ([198.145.29.136]:60212 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933857AbdBVT1z (ORCPT ); Wed, 22 Feb 2017 14:27:55 -0500 MIME-Version: 1.0 In-Reply-To: <22850768-8ea8-3d56-5c34-31f24ca3b487@suse.de> References: <20170222022929.10540-1-afaerber@suse.de> <22850768-8ea8-3d56-5c34-31f24ca3b487@suse.de> From: Rob Herring Date: Wed, 22 Feb 2017 13:27:29 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement To: =?UTF-8?Q?Andreas_F=C3=A4rber?= Cc: "linux-arm-kernel@lists.infradead.org" , Eric Miao , Haojian Zhuang , info@andromedabox.org, "linux-kernel@vger.kernel.org" , Thomas Petazzoni , Gregory Clement , "devicetree@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 22, 2017 at 10:43 AM, Andreas Färber wrote: > Hi Rob, > > Am 22.02.2017 um 14:34 schrieb Rob Herring: >> On Tue, Feb 21, 2017 at 8:29 PM, Andreas Färber wrote: >>> One limitation is currently the lack of an IAP140 clk driver. Patch 4/4 works >>> around that for UART0 with a fixed-clock. >> >> The PXA1928 clock driver should be close to what you need. They are >> supposed to be very similar. > > Where do you see that in mainline? Not in drivers/clk/pxa/ at least. I'm > certain the acorn-marvell tree has a PXA1908 clk driver somewhere, too, > I just haven't ported it yet. drivers/clk/mmp/clk-of-pxa1928.c I ported/rewrote that from Marvell's 3.10 vendor tree. >>> Andreas Färber (8): >>> Documentation: arm: Marvell: Document IAP140 >>> tty: serial: Suppress deprecated SERIAL_PXA on arm64 >>> tty: serial: 8250_pxa: Implement mmp earlycon >> >> You should not use the pxa serial driver. AFAICT, it was separate to >> add DMA support, but now the base 8250 driver supports DMA. The base >> 8250 driver works with the PXA1928 and should also work with the >> PXA1908. > > Do you personally have one? I didn't spot a pxa1928 DT in mainline. Yes. It never got released and got abandoned. I got several drivers cleaned up to support it and the clock code in before that happened. I had a in-progress DRM driver too. I was debugging why some monitors worked and others didn't when I stopped working on it. I think the board you are working on has the same ADV7533? It's all up on my Linaro tree: https://git.linaro.org/people/rob.herring/linux.git > So, by my reading both 8250_of.c and 8250_pxa.c list "mrvl,mmp-uart" for > the platform driver. Is that really intentional? Humm, well I added support in commit 6ad991b699b4e to of_serial.c and then it looks like it got copied to 8250_pxa.c recently. Not sure if that really made sense or not. We should remove one of them. 8250_pxa.c looks fairly pointless to me. Turning a clock on/off in resume/suspend is already supported by 8250_of.c (which doesn't have the bug of turning off the console's clock in suspend). The only other thing is the errata in serial_pxa_dl_write. > What the early_pxa earlycon does is set the register shift and then > reuse the 8250 core - that looks perfectly valid to me. Are you possibly > mixing that up with the non-8250 pxa serial driver that I am already > suppressing one patch earlier? The earlycon core already sets up reg-shift for you. I added earlycon support in commit a4c639b04f301d. I used "ns16650a" as a fallback compatible string, so there's not an explicit PXA/MMP compatible string there. > While at it, are you aware that we have two drivers, one pxa and one > mmp, that bind to "marvell,pdma-1.0"? That seemed wrong to me, too. Yeah, it was drivers/tty/serial/pxa.c that I was thinking of. I was incorrectly thinking 8250_pxa.c was that one. Rob