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From: Rob Herring <robh@kernel.org>
To: "Andreas Färber" <afaerber@suse.de>
Cc: "linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	Eric Miao <eric.y.miao@gmail.com>,
	Haojian Zhuang <haojian.zhuang@gmail.com>,
	info@andromedabox.org,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
	Gregory Clement <gregory.clement@free-electrons.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement
Date: Wed, 22 Feb 2017 07:34:25 -0600	[thread overview]
Message-ID: <CAL_JsqJmv--wP+gEt27ZbTT+8GeqKhYc=x3MTPBiz2Jr2wys8A@mail.gmail.com> (raw)
In-Reply-To: <20170222022929.10540-1-afaerber@suse.de>

On Tue, Feb 21, 2017 at 8:29 PM, Andreas Färber <afaerber@suse.de> wrote:
> Hello,
>
> This series adds initial support for the Marvell IAP140 SoC (aka PXA1908)
> and the Andromeda Box Edge development board.
>
> v2 reuses ARCH_MMP.
>
> Both earlycon and serial are working, but an explicit console=ttyS0,115200n8
> is needed; with just "earlycon" and stdout-path the earlycon stops early and
> switches to a tty0, long before disabling the bootconsole...
>
> All four CPUs come up, and an initrd can be reached.
>
> However, there are errors about CPUs 1-3 having a zero SYS_CNTFRQ_EL0:
>
> [    0.095812] smp: Bringing up secondary CPUs ...
> ======pxa1908_pmu_core_pwr_on: mpidr = 0x1
> ======pxa1908_pmu_core_pwr_on: mpidr = 0x2
> ======pxa1908_pmu_core_pwr_on: mpidr = 0x3
> [    0.133419] Detected VIPT I-cache on CPU1
> [    0.133430] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU1: 0x00000000000000
> [    0.133447] Unsupported CPU feature variation.
> ...
> [    0.133748] CPU1: Booted secondary processor [410fd032]
> [    0.165465] Detected VIPT I-cache on CPU2
> [    0.165474] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU2: 0x00000000000000
> [    0.165505] CPU2: Booted secondary processor [410fd032]
> [    0.197539] Detected VIPT I-cache on CPU3
> [    0.197546] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU3: 0x00000000000000
> [    0.197573] CPU3: Booted secondary processor [410fd032]
> [    0.197625] smp: Brought up 1 node, 4 CPUs
> [    0.522514] SMP: Total of 4 processors activated.
> [    0.527212] CPU features: detected feature: 32-bit EL0 Support
> [    0.533105] CPU: All CPU(s) started at EL2
>
> KVM appears to initialize okay, but was not yet tested with guests.
>
> [    0.865255] kvm [1]: 8-bit VMID
> [    0.868401] kvm [1]: IDMAP page: d23000
> [    0.872233] kvm [1]: HYP VA range: 800000000000:ffffffffffff
> [    0.878262] kvm [1]: Hyp mode initialized successfully
> [    0.883429] kvm [1]: vgic-v2@d1dfc000
> [    0.887179] kvm [1]: vgic interrupt IRQ1
> [    0.891120] kvm [1]: virtual timer IRQ4
>
> One limitation is currently the lack of an IAP140 clk driver. Patch 4/4 works
> around that for UART0 with a fixed-clock.

The PXA1928 clock driver should be close to what you need. They are
supposed to be very similar.

> A 3.14 based tree is available on GitHub acorn-marvell/brillo_pxa_kernel.
>
> Booting required changes to the vendor U-Boot,
> cf. https://en.opensuse.org/HCL:AndromedaBoxEdge
>
> https://github.com/afaerber/linux/commits/edge-next
>
> Have a lot of fun!
>
> Cheers,
> Andreas
>
> v1 -> v2:
> * Add non-DT documentation
> * Use ARCH_MMP instead of ARCH_PXA
> * Split off Kconfig cleanups per subsystem
> * Drop "mrvl,pxa-uart" and instead implement mmp earlycon
> * Add some more DT nodes
>
> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: Gregory Clement <gregory.clement@free-electrons.com>
> Cc: info@andromedabox.org
> Cc: devicetree@vger.kernel.org
>
> Andreas Färber (8):
>   Documentation: arm: Marvell: Document IAP140
>   tty: serial: Suppress deprecated SERIAL_PXA on arm64
>   tty: serial: 8250_pxa: Implement mmp earlycon

You should not use the pxa serial driver. AFAICT, it was separate to
add DMA support, but now the base 8250 driver supports DMA. The base
8250 driver works with the PXA1928 and should also work with the
PXA1908.

>   sound: soc: pxa: Suppress SND_MMP_SOC for arm64
>   ARM64: Prepare Marvell IAP140 aka PXA1908
>   Documentation: devicetree: arm: marvell: Document IAP140
>   ARM64: dts: marvell: Add IAP140 and Andromeda Box Edge
>   ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

  parent reply	other threads:[~2017-02-22 13:34 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-22  2:29 [PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement Andreas Färber
2017-02-22  2:29 ` [PATCH v2 1/8] Documentation: arm: Marvell: Document IAP140 Andreas Färber
2017-02-22  2:29 ` [PATCH v2 2/8] tty: serial: Suppress deprecated SERIAL_PXA on arm64 Andreas Färber
2017-02-22  2:29 ` [PATCH v2 3/8] tty: serial: 8250_pxa: Implement mmp earlycon Andreas Färber
2017-02-22  2:29 ` [PATCH v2 4/8] sound: soc: pxa: Suppress SND_MMP_SOC for arm64 Andreas Färber
2017-02-22 18:47   ` Mark Brown
2017-02-23 14:11     ` Andreas Färber
2017-02-23 14:24       ` Takashi Iwai
2017-02-23 14:45         ` Andreas Färber
2017-02-22  2:29 ` [PATCH v2 5/8] ARM64: Prepare Marvell IAP140 aka PXA1908 Andreas Färber
2017-02-22  2:29 ` [PATCH v2 6/8] Documentation: devicetree: arm: marvell: Document IAP140 Andreas Färber
2017-02-27 22:31   ` Rob Herring
2017-02-22  2:29 ` [PATCH v2 7/8] ARM64: dts: marvell: Add IAP140 and Andromeda Box Edge Andreas Färber
2017-02-22  2:29 ` [PATCH v2 8/8] ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock Andreas Färber
2017-02-22 13:34 ` Rob Herring [this message]
2017-02-22 16:43   ` [PATCH v2 0/8] ARM64: Initial Marvell IAP140 enablement Andreas Färber
2017-02-22 16:48     ` Andreas Färber
2017-02-22 19:27     ` Rob Herring

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