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* [PATCH v2] dt-bindings: dma: convert arm-pl08x to yaml
@ 2021-04-29 19:25 Corentin Labbe
  2021-04-29 20:38 ` Rob Herring
  0 siblings, 1 reply; 2+ messages in thread
From: Corentin Labbe @ 2021-04-29 19:25 UTC (permalink / raw)
  To: robh+dt, vkoul; +Cc: devicetree, dmaengine, linux-kernel, Corentin Labbe

Converts dma/arm-pl08x.txt to yaml.
In the process, I add an example for the faraday variant.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
Changes since v1:
- fixes yamllint warning about indent
- added select
- fixed example (needed includes)

 .../devicetree/bindings/dma/arm-pl08x.txt     |  59 --------
 .../devicetree/bindings/dma/arm-pl08x.yaml    | 141 ++++++++++++++++++
 2 files changed, 141 insertions(+), 59 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/dma/arm-pl08x.txt
 create mode 100644 Documentation/devicetree/bindings/dma/arm-pl08x.yaml

diff --git a/Documentation/devicetree/bindings/dma/arm-pl08x.txt b/Documentation/devicetree/bindings/dma/arm-pl08x.txt
deleted file mode 100644
index 0ba81f79266f..000000000000
--- a/Documentation/devicetree/bindings/dma/arm-pl08x.txt
+++ /dev/null
@@ -1,59 +0,0 @@
-* ARM PrimeCells PL080 and PL081 and derivatives DMA controller
-
-Required properties:
-- compatible: "arm,pl080", "arm,primecell";
-	      "arm,pl081", "arm,primecell";
-	      "faraday,ftdmac020", "arm,primecell"
-- arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded
-  in the hardware and must be specified here as <0x0003b080>. This number
-  follows the PrimeCell standard numbering using the JEP106 vendor code 0x38
-  for Faraday Technology.
-- reg: Address range of the PL08x registers
-- interrupt: The PL08x interrupt number
-- clocks: The clock running the IP core clock
-- clock-names: Must contain "apb_pclk"
-- lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs
-- lli-bus-interface-ahb2: if AHB master 2 is eligible for fetching LLIs
-- mem-bus-interface-ahb1: if AHB master 1 is eligible for fetching memory contents
-- mem-bus-interface-ahb2: if AHB master 2 is eligible for fetching memory contents
-- #dma-cells: must be <2>. First cell should contain the DMA request,
-              second cell should contain either 1 or 2 depending on
-              which AHB master that is used.
-
-Optional properties:
-- dma-channels: contains the total number of DMA channels supported by the DMAC
-- dma-requests: contains the total number of DMA requests supported by the DMAC
-- memcpy-burst-size: the size of the bursts for memcpy: 1, 4, 8, 16, 32
-  64, 128 or 256 bytes are legal values
-- memcpy-bus-width: the bus width used for memcpy in bits: 8, 16 or 32 are legal
-  values, the Faraday FTDMAC020 can also accept 64 bits
-
-Clients
-Required properties:
-- dmas: List of DMA controller phandle, request channel and AHB master id
-- dma-names: Names of the aforementioned requested channels
-
-Example:
-
-dmac0: dma-controller@10130000 {
-	compatible = "arm,pl080", "arm,primecell";
-	reg = <0x10130000 0x1000>;
-	interrupt-parent = <&vica>;
-	interrupts = <15>;
-	clocks = <&hclkdma0>;
-	clock-names = "apb_pclk";
-	lli-bus-interface-ahb1;
-	lli-bus-interface-ahb2;
-	mem-bus-interface-ahb2;
-	memcpy-burst-size = <256>;
-	memcpy-bus-width = <32>;
-	#dma-cells = <2>;
-};
-
-device@40008000 {
-	...
-	dmas = <&dmac0 0 2
-		&dmac0 1 2>;
-	dma-names = "tx", "rx";
-	...
-};
diff --git a/Documentation/devicetree/bindings/dma/arm-pl08x.yaml b/Documentation/devicetree/bindings/dma/arm-pl08x.yaml
new file mode 100644
index 000000000000..06dec6f3e9a8
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/arm-pl08x.yaml
@@ -0,0 +1,141 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller
+
+maintainers:
+  - Vinod Koul <vkoul@kernel.org>
+
+allOf:
+  - $ref: "dma-controller.yaml#"
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - arm,pl080
+          - arm,pl081
+  required:
+    - compatible
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: "arm,pl080"
+          - const: "arm,primecell"
+      - items:
+          - const: "arm,pl081"
+          - const: "arm,primecell"
+      - items:
+          - const: faraday,ftdma020
+          - const: arm,pl080
+          - const: arm,primecell
+  arm,primecell-periphid:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: on the FTDMAC020 the primecell ID is not hard-coded
+                 in the hardware and must be specified here as <0x0003b080>. This number
+                 follows the PrimeCell standard numbering using the JEP106 vendor code 0x38
+                 for Faraday Technology.
+  reg:
+    minItems: 1
+    description: Address range of the PL08x registers
+  interrupts:
+    minItems: 1
+    description: The PL08x interrupt number
+  clocks:
+    minItems: 1
+    description: The clock running the IP core clock
+  clock-names:
+    const: "apb_pclk"
+  lli-bus-interface-ahb1:
+    type: boolean
+    description: if AHB master 1 is eligible for fetching LLIs
+  lli-bus-interface-ahb2:
+    type: boolean
+    description: if AHB master 2 is eligible for fetching LLIs
+  mem-bus-interface-ahb1:
+    type: boolean
+    description: if AHB master 1 is eligible for fetching memory contents
+  mem-bus-interface-ahb2:
+    type: boolean
+    description: if AHB master 2 is eligible for fetching memory contents
+  "#dma-cells":
+    const: 2
+    description: must be <2>. First cell should contain the DMA request,
+                 second cell should contain either 1 or 2 depending on
+                 which AHB master that is used.
+
+  memcpy-burst-size:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum:
+      - 1
+      - 4
+      - 8
+      - 16
+      - 32
+      - 64
+      - 128
+      - 256
+    description: the size of the bursts for memcpy
+  memcpy-bus-width:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum:
+      - 8
+      - 16
+      - 32
+      - 64
+    description: |
+                 the bus width used for memcpy in bits: 8, 16 or 32 are legal
+                 values, the Faraday FTDMAC020 can also accept 64 bits
+
+required:
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+  - "#dma-cells"
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    dmac0: dma-controller@10130000 {
+      compatible = "arm,pl080", "arm,primecell";
+      reg = <0x10130000 0x1000>;
+      interrupt-parent = <&vica>;
+      interrupts = <15>;
+      clocks = <&hclkdma0>;
+      clock-names = "apb_pclk";
+      lli-bus-interface-ahb1;
+      lli-bus-interface-ahb2;
+      mem-bus-interface-ahb2;
+      memcpy-burst-size = <256>;
+      memcpy-bus-width = <32>;
+      #dma-cells = <2>;
+    };
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    #include <dt-bindings/reset/cortina,gemini-reset.h>
+    #include <dt-bindings/clock/cortina,gemini-clock.h>
+    dma-controller@67000000 {
+      compatible = "faraday,ftdma020", "arm,pl080", "arm,primecell";
+      /* Faraday Technology FTDMAC020 variant */
+      arm,primecell-periphid = <0x0003b080>;
+      reg = <0x67000000 0x1000>;
+      interrupts = <9 IRQ_TYPE_EDGE_RISING>;
+      resets = <&syscon GEMINI_RESET_DMAC>;
+      clocks = <&syscon GEMINI_CLK_AHB>;
+      clock-names = "apb_pclk";
+      /* Bus interface AHB1 (AHB0) is totally tilted */
+      lli-bus-interface-ahb2;
+      mem-bus-interface-ahb2;
+      memcpy-burst-size = <256>;
+      memcpy-bus-width = <32>;
+      #dma-cells = <2>;
+    };
-- 
2.26.3


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH v2] dt-bindings: dma: convert arm-pl08x to yaml
  2021-04-29 19:25 [PATCH v2] dt-bindings: dma: convert arm-pl08x to yaml Corentin Labbe
@ 2021-04-29 20:38 ` Rob Herring
  0 siblings, 0 replies; 2+ messages in thread
From: Rob Herring @ 2021-04-29 20:38 UTC (permalink / raw)
  To: Corentin Labbe
  Cc: Vinod, devicetree,
	open list:DMA GENERIC OFFLOAD ENGINE SUBSYSTEM, linux-kernel

On Thu, Apr 29, 2021 at 2:25 PM Corentin Labbe <clabbe@baylibre.com> wrote:
>
> Converts dma/arm-pl08x.txt to yaml.
> In the process, I add an example for the faraday variant.
>
> Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
> ---
> Changes since v1:
> - fixes yamllint warning about indent
> - added select
> - fixed example (needed includes)
>
>  .../devicetree/bindings/dma/arm-pl08x.txt     |  59 --------
>  .../devicetree/bindings/dma/arm-pl08x.yaml    | 141 ++++++++++++++++++
>  2 files changed, 141 insertions(+), 59 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/dma/arm-pl08x.txt
>  create mode 100644 Documentation/devicetree/bindings/dma/arm-pl08x.yaml

> diff --git a/Documentation/devicetree/bindings/dma/arm-pl08x.yaml b/Documentation/devicetree/bindings/dma/arm-pl08x.yaml
> new file mode 100644
> index 000000000000..06dec6f3e9a8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/arm-pl08x.yaml
> @@ -0,0 +1,141 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller
> +
> +maintainers:
> +  - Vinod Koul <vkoul@kernel.org>
> +
> +allOf:
> +  - $ref: "dma-controller.yaml#"
> +
> +# We need a select here so we don't match all nodes with 'arm,primecell'
> +select:
> +  properties:
> +    compatible:
> +      contains:
> +        enum:
> +          - arm,pl080
> +          - arm,pl081
> +  required:
> +    - compatible
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: "arm,pl080"
> +          - const: "arm,primecell"
> +      - items:
> +          - const: "arm,pl081"
> +          - const: "arm,primecell"

The first 2 oneOf entries can be combined into one.

And you don't need quotes.

> +      - items:
> +          - const: faraday,ftdma020
> +          - const: arm,pl080
> +          - const: arm,primecell

blank line between each DT property

> +  arm,primecell-periphid:
> +    $ref: /schemas/types.yaml#/definitions/uint32

This already has a type in the common definition, so drop.

> +    description: on the FTDMAC020 the primecell ID is not hard-coded
> +                 in the hardware and must be specified here as <0x0003b080>. This number
> +                 follows the PrimeCell standard numbering using the JEP106 vendor code 0x38
> +                 for Faraday Technology.
> +  reg:
> +    minItems: 1

Convention is 'maxItems: 1'.

> +    description: Address range of the PL08x registers
> +  interrupts:
> +    minItems: 1
> +    description: The PL08x interrupt number
> +  clocks:
> +    minItems: 1
> +    description: The clock running the IP core clock
> +  clock-names:
> +    const: "apb_pclk"

primecell.yaml already covers this IIRC. Just 'maxItems: 1' is fine here.

> +  lli-bus-interface-ahb1:
> +    type: boolean
> +    description: if AHB master 1 is eligible for fetching LLIs
> +  lli-bus-interface-ahb2:
> +    type: boolean
> +    description: if AHB master 2 is eligible for fetching LLIs
> +  mem-bus-interface-ahb1:
> +    type: boolean
> +    description: if AHB master 1 is eligible for fetching memory contents
> +  mem-bus-interface-ahb2:
> +    type: boolean
> +    description: if AHB master 2 is eligible for fetching memory contents
> +  "#dma-cells":
> +    const: 2
> +    description: must be <2>. First cell should contain the DMA request,

'must be <2>' is already stated by the schema.

> +                 second cell should contain either 1 or 2 depending on
> +                 which AHB master that is used.
> +
> +  memcpy-burst-size:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum:
> +      - 1
> +      - 4
> +      - 8
> +      - 16
> +      - 32
> +      - 64
> +      - 128
> +      - 256
> +    description: the size of the bursts for memcpy
> +  memcpy-bus-width:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum:
> +      - 8
> +      - 16
> +      - 32
> +      - 64
> +    description: |

Don't need '|' unless you need to preserve formatting.

> +                 the bus width used for memcpy in bits: 8, 16 or 32 are legal
> +                 values, the Faraday FTDMAC020 can also accept 64 bits
> +
> +required:
> +  - reg
> +  - interrupts
> +  - clocks
> +  - clock-names
> +  - "#dma-cells"
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    dmac0: dma-controller@10130000 {
> +      compatible = "arm,pl080", "arm,primecell";
> +      reg = <0x10130000 0x1000>;
> +      interrupt-parent = <&vica>;
> +      interrupts = <15>;
> +      clocks = <&hclkdma0>;
> +      clock-names = "apb_pclk";
> +      lli-bus-interface-ahb1;
> +      lli-bus-interface-ahb2;
> +      mem-bus-interface-ahb2;
> +      memcpy-burst-size = <256>;
> +      memcpy-bus-width = <32>;
> +      #dma-cells = <2>;
> +    };
> +  - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/reset/cortina,gemini-reset.h>
> +    #include <dt-bindings/clock/cortina,gemini-clock.h>
> +    dma-controller@67000000 {
> +      compatible = "faraday,ftdma020", "arm,pl080", "arm,primecell";
> +      /* Faraday Technology FTDMAC020 variant */
> +      arm,primecell-periphid = <0x0003b080>;
> +      reg = <0x67000000 0x1000>;
> +      interrupts = <9 IRQ_TYPE_EDGE_RISING>;
> +      resets = <&syscon GEMINI_RESET_DMAC>;
> +      clocks = <&syscon GEMINI_CLK_AHB>;
> +      clock-names = "apb_pclk";
> +      /* Bus interface AHB1 (AHB0) is totally tilted */
> +      lli-bus-interface-ahb2;
> +      mem-bus-interface-ahb2;
> +      memcpy-burst-size = <256>;
> +      memcpy-bus-width = <32>;
> +      #dma-cells = <2>;
> +    };
> --
> 2.26.3
>

^ permalink raw reply	[flat|nested] 2+ messages in thread

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