From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752593AbdKHNZg (ORCPT ); Wed, 8 Nov 2017 08:25:36 -0500 Received: from mail.kernel.org ([198.145.29.99]:41106 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751598AbdKHNZc (ORCPT ); Wed, 8 Nov 2017 08:25:32 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9D31C21921 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=robh+dt@kernel.org X-Google-Smtp-Source: ABhQp+Ql/qKQ85PFQr0i/1ZP+6dUTJKY/Sv2ytdCzeZRo/hTNcpnRXAAlo/1wCi+LFDoXTkE7K7ah5Ga5KZpsgeVnHY= MIME-Version: 1.0 In-Reply-To: References: From: Rob Herring Date: Wed, 8 Nov 2017 07:25:10 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 27/31] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller To: Greentime Hu Cc: greentime@andestech.com, "linux-kernel@vger.kernel.org" , Arnd Bergmann , "linux-arch@vger.kernel.org" , Thomas Gleixner , Jason Cooper , Marc Zyngier , netdev , Rick Chen , "devicetree@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org +DT list On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu wrote: > From: Greentime Hu Commit msg needed. > Signed-off-by: Rick Chen > Signed-off-by: Greentime Hu > --- > .../interrupt-controller/andestech,ativic32.txt | 27 ++++++++++++++++++++ > 1 file changed, 27 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt > new file mode 100644 > index 0000000..6bac908 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt > @@ -0,0 +1,27 @@ > +* Andestech Internal Vector Interrupt Controller > + > +The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller > +suitable for a simpler SoC platform not requiring a more sophisticated and > +bigger External Vector Interrupt Controller. > + > + > +Main node required properties: > + > +- compatible : should at least contain "andestech,ativic32". > +- interrupt-parent: Empty for the interrupt controller itself Drop this. > +- interrupt-controller : Identifies the node as an interrupt controller > +- #interrupt-cells: The number of cells to define the interrupts. Should be 2. > + The first cell is the IRQ number > + The second cell is used to specify mode: > + 1 = low-to-high edge triggered > + 2 = high-to-low edge triggered > + 4 = active high level-sensitive > + 8 = active low level-sensitive Just state 2 cells and refer to interrupt-controller/interrupts.txt. > + Default for internal sources should be set to 4 (active high). > + > +Examples: > + intc: interrupt-controller { > + compatible = "andestech,ativic32"; > + #interrupt-cells = <2>; > + interrupt-controller; > + }; > -- > 1.7.9.5 >