linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* Re: [PATCH v3 11/12] drm/mediatek: add DSC support for MT8195
       [not found] ` <20210715173750.10852-12-jason-jh.lin@mediatek.com>
@ 2021-07-15 23:21   ` Chun-Kuang Hu
  0 siblings, 0 replies; 5+ messages in thread
From: Chun-Kuang Hu @ 2021-07-15 23:21 UTC (permalink / raw)
  To: jason-jh.lin
  Cc: Chun-Kuang Hu, Matthias Brugger, Linux ARM,
	moderated list:ARM/Mediatek SoC support, linux-kernel,
	Project_Global_Chrome_Upstream_Group, fshao, Nancy Lin,
	singo.chang

Hi, Jason:

jason-jh.lin <jason-jh.lin@mediatek.com> 於 2021年7月16日 週五 上午1:38寫道:
>
> Add DSC module file:
>   DSC is designed for real-time systems with real-time compression,
>   transmission, decompression and display.
>   The DSC standard is a specification of the algorithms used for
>   compressing and decompressing image display streams, including
>   the specification of the syntax and semantics of the compressed
>   video bit stream.
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/Makefile           |   1 +
>  drivers/gpu/drm/mediatek/mtk_disp_drv.h     |   8 +
>  drivers/gpu/drm/mediatek/mtk_disp_dsc.c     | 161 ++++++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |  19 ++-
>  drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |   1 +
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   8 +-
>  drivers/gpu/drm/mediatek/mtk_drm_drv.h      |   1 +
>  7 files changed, 194 insertions(+), 5 deletions(-)
>  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_dsc.c
>
> diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile
> index dc54a7a69005..44948e221fd3 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -2,6 +2,7 @@
>
>  mediatek-drm-y := mtk_disp_ccorr.o \
>                   mtk_disp_color.o \
> +                 mtk_disp_dsc.o \
>                   mtk_disp_gamma.o \
>                   mtk_disp_ovl.o \
>                   mtk_disp_rdma.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index cafd9df2d63b..c7e9bd370acd 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -33,6 +33,14 @@ void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,
>  void mtk_dpi_start(struct device *dev);
>  void mtk_dpi_stop(struct device *dev);
>
> +int mtk_dsc_clk_enable(struct device *dev);
> +void mtk_dsc_clk_disable(struct device *dev);
> +void mtk_dsc_config(struct device *dev, unsigned int width,
> +                   unsigned int height, unsigned int vrefresh,
> +                   unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> +void mtk_dsc_start(struct device *dev);
> +void mtk_dsc_stop(struct device *dev);
> +
>  void mtk_dsi_ddp_start(struct device *dev);
>  void mtk_dsi_ddp_stop(struct device *dev);
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_dsc.c b/drivers/gpu/drm/mediatek/mtk_disp_dsc.c
> new file mode 100644
> index 000000000000..6a196220c532
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_dsc.c
> @@ -0,0 +1,161 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2021 MediaTek Inc.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/component.h>
> +#include <linux/of_device.h>
> +#include <linux/of_irq.h>
> +#include <linux/platform_device.h>
> +#include <linux/soc/mediatek/mtk-cmdq.h>
> +
> +#include "mtk_drm_crtc.h"
> +#include "mtk_drm_ddp_comp.h"
> +#include "mtk_drm_gem.h"
> +#include "mtk_disp_drv.h"
> +
> +#define DISP_REG_DSC_CON                       0x0000
> +#define DSC_EN                                 BIT(0)
> +#define DSC_DUAL_INOUT                         BIT(2)
> +#define DSC_BYPASS                             BIT(4)
> +#define DSC_UFOE_SEL                           BIT(16)
> +
> +/**
> + * struct mtk_disp_dsc - DISP_DSC driver structure
> + * @clk - clk of dsc hardware
> + * @regs - hardware register address of dsc
> + * @cmdq_reg - structure containing cmdq hardware resource
> + */
> +struct mtk_disp_dsc {
> +       struct clk *clk;
> +       void __iomem *regs;
> +       struct cmdq_client_reg          cmdq_reg;
> +};

Squash mtk_disp_dsc.c into mtk_drm_ddp_comp.c and this patch would be
much simpler.

> +
> +void mtk_dsc_start(struct device *dev)
> +{
> +       struct mtk_disp_dsc *dsc = dev_get_drvdata(dev);
> +       void __iomem *baddr = dsc->regs;

baddr is used only once, so use dsc->regs directly.

> +
> +       mtk_ddp_write_mask(NULL, DSC_EN, &dsc->cmdq_reg, baddr,
> +                          DISP_REG_DSC_CON, DSC_EN);
> +}
> +
> +void mtk_dsc_stop(struct device *dev)
> +{
> +       struct mtk_disp_dsc *dsc = dev_get_drvdata(dev);
> +       void __iomem *baddr = dsc->regs;

Ditto.

> +
> +       mtk_ddp_write_mask(NULL, 0x0, &dsc->cmdq_reg, baddr,
> +                          DISP_REG_DSC_CON, DSC_EN);
> +}
> +
> +int mtk_dsc_clk_enable(struct device *dev)
> +{
> +       struct mtk_disp_dsc *dsc = dev_get_drvdata(dev);
> +
> +       return clk_prepare_enable(dsc->clk);
> +}
> +
> +void mtk_dsc_clk_disable(struct device *dev)
> +{
> +       struct mtk_disp_dsc *dsc = dev_get_drvdata(dev);
> +
> +       clk_disable_unprepare(dsc->clk);
> +}
> +
> +void mtk_dsc_config(struct device *dev, unsigned int w,
> +                   unsigned int h, unsigned int vrefresh,
> +                   unsigned int bpc, struct cmdq_pkt *handle)
> +{
> +       struct mtk_disp_dsc *dsc = dev_get_drvdata(dev);
> +
> +       /* dsc bypass mode */
> +       mtk_ddp_write_mask(handle, DSC_BYPASS, &dsc->cmdq_reg, dsc->regs,
> +                          DISP_REG_DSC_CON, DSC_BYPASS);
> +       mtk_ddp_write_mask(handle, DSC_UFOE_SEL, &dsc->cmdq_reg, dsc->regs,
> +                          DISP_REG_DSC_CON, DSC_UFOE_SEL);
> +       mtk_ddp_write_mask(handle, DSC_DUAL_INOUT, &dsc->cmdq_reg, dsc->regs,
> +                          DISP_REG_DSC_CON, DSC_DUAL_INOUT);
> +}
> +
> +static int mtk_disp_dsc_bind(struct device *dev, struct device *master,
> +                            void *data)
> +{
> +       return 0;
> +}
> +
> +static void mtk_disp_dsc_unbind(struct device *dev, struct device *master,
> +                               void *data)
> +{
> +}
> +
> +static const struct component_ops mtk_disp_dsc_component_ops = {
> +       .bind = mtk_disp_dsc_bind,
> +       .unbind = mtk_disp_dsc_unbind,
> +};
> +
> +static int mtk_disp_dsc_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct resource *res;
> +       struct mtk_disp_dsc *priv;
> +       int irq;
> +       int ret;
> +
> +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> +       if (!priv)
> +               return -ENOMEM;
> +
> +       priv->clk = devm_clk_get(dev, NULL);
> +       if (IS_ERR(priv->clk)) {
> +               dev_err(dev, "failed to get dsc clk\n");
> +               return PTR_ERR(priv->clk);
> +       }
> +
> +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +       priv->regs = devm_ioremap_resource(dev, res);
> +       if (IS_ERR(priv->regs)) {
> +               dev_err(dev, "failed to ioremap dsc\n");
> +               return PTR_ERR(priv->regs);
> +       }
> +
> +#if IS_REACHABLE(CONFIG_MTK_CMDQ)
> +       ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);
> +       if (ret)
> +               dev_dbg(dev, "get mediatek,gce-client-reg fail!\n");
> +#endif
> +
> +       platform_set_drvdata(pdev, priv);
> +
> +       ret = component_add(dev, &mtk_disp_dsc_component_ops);
> +       if (ret != 0)
> +               dev_err(dev, "Failed to add component: %d\n", ret);
> +
> +       return ret;
> +}
> +
> +static int mtk_disp_dsc_remove(struct platform_device *pdev)
> +{
> +       component_del(&pdev->dev, &mtk_disp_dsc_component_ops);
> +
> +       return 0;
> +}
> +
> +static const struct of_device_id mtk_disp_dsc_driver_dt_match[] = {
> +       { .compatible = "mediatek,mt8195-disp-dsc", },
> +       {},
> +};
> +
> +MODULE_DEVICE_TABLE(of, mtk_disp_dsc_driver_dt_match);
> +
> +struct platform_driver mtk_disp_dsc_driver = {
> +       .probe = mtk_disp_dsc_probe,
> +       .remove = mtk_disp_dsc_remove,
> +       .driver = {
> +               .name = "mediatek-disp-dsc",
> +               .owner = THIS_MODULE,
> +               .of_match_table = mtk_disp_dsc_driver_dt_match,
> +       },
> +};
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 75bc00e17fc4..ba3d7a1ce7ab 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -333,6 +333,14 @@ static const struct mtk_ddp_comp_funcs ddp_rdma = {
>         .layer_config = mtk_rdma_layer_config,
>  };
>
> +static const struct mtk_ddp_comp_funcs ddp_dsc = {
> +       .config = mtk_dsc_config,
> +       .start = mtk_dsc_start,
> +       .stop = mtk_dsc_stop,
> +       .clk_enable = mtk_dsc_clk_enable,
> +       .clk_disable = mtk_dsc_clk_disable,
> +};
> +
>  static const struct mtk_ddp_comp_funcs ddp_ufoe = {
>         .clk_enable = mtk_ddp_clk_enable,
>         .clk_disable = mtk_ddp_clk_disable,
> @@ -356,6 +364,7 @@ static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
>         [MTK_DISP_MUTEX] = "mutex",
>         [MTK_DISP_OD] = "od",
>         [MTK_DISP_BLS] = "bls",
> +       [MTK_DISP_DSC] = "dsc",
>  };
>
>  struct mtk_ddp_comp_match {
> @@ -374,6 +383,9 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
>         [DDP_COMPONENT_DITHER]  = { MTK_DISP_DITHER,    0, &ddp_dither },
>         [DDP_COMPONENT_DPI0]    = { MTK_DPI,            0, &ddp_dpi },
>         [DDP_COMPONENT_DPI1]    = { MTK_DPI,            1, &ddp_dpi },
> +       [DDP_COMPONENT_DSC0]    = { MTK_DISP_DSC,       0, &ddp_dsc },
> +       [DDP_COMPONENT_DSC1]    = { MTK_DISP_DSC,       1, &ddp_dsc },
> +       [DDP_COMPONENT_DSC1_VIRTUAL0]   = { MTK_DISP_DSC,       -1, &ddp_dsc },

What is DDP_COMPONENT_DSC1_VIRTUAL0? If use less, remove it.

>         [DDP_COMPONENT_DSI0]    = { MTK_DSI,            0, &ddp_dsi },
>         [DDP_COMPONENT_DSI1]    = { MTK_DSI,            1, &ddp_dsi },
>         [DDP_COMPONENT_DSI2]    = { MTK_DSI,            2, &ddp_dsi },
> @@ -508,13 +520,14 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp,
>         if (type == MTK_DISP_BLS ||
>             type == MTK_DISP_CCORR ||
>             type == MTK_DISP_COLOR ||
> +           type == MTK_DISP_DSC ||
>             type == MTK_DISP_GAMMA ||
> -           type == MTK_DPI ||
> -           type == MTK_DSI ||
>             type == MTK_DISP_OVL ||
>             type == MTK_DISP_OVL_2L ||
>             type == MTK_DISP_PWM ||
> -           type == MTK_DISP_RDMA)
> +           type == MTK_DISP_RDMA ||
> +           type == MTK_DPI ||
> +           type == MTK_DSI)

Moving MTK_DPI and MTK_DSI is not related to DSC, so move this
modification to another patch.

>                 return 0;
>
>         priv = devm_kzalloc(comp->dev, sizeof(*priv), GFP_KERNEL);
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> index bb914d976cf5..661fb620e266 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
> @@ -34,6 +34,7 @@ enum mtk_ddp_comp_type {
>         MTK_DISP_MUTEX,
>         MTK_DISP_OD,
>         MTK_DISP_BLS,
> +       MTK_DISP_DSC,
>         MTK_DDP_COMP_TYPE_MAX,
>  };
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index d6f6d1bdad85..990a54049a7d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -446,6 +446,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
>           .data = (void *)MTK_DISP_GAMMA, },
>         { .compatible = "mediatek,mt8183-disp-dither",
>           .data = (void *)MTK_DISP_DITHER },
> +       { .compatible = "mediatek,mt8195-disp-dsc",
> +         .data = (void *)MTK_DISP_DSC },
>         { .compatible = "mediatek,mt8173-disp-ufoe",
>           .data = (void *)MTK_DISP_UFOE },
>         { .compatible = "mediatek,mt2701-dsi",
> @@ -562,12 +564,13 @@ static int mtk_drm_probe(struct platform_device *pdev)
>                  */
>                 if (comp_type == MTK_DISP_CCORR ||
>                     comp_type == MTK_DISP_COLOR ||
> +                   comp_type == MTK_DISP_DSC ||
>                     comp_type == MTK_DISP_GAMMA ||
>                     comp_type == MTK_DISP_OVL ||
>                     comp_type == MTK_DISP_OVL_2L ||
>                     comp_type == MTK_DISP_RDMA ||
> -                   comp_type == MTK_DSI ||
> -                   comp_type == MTK_DPI) {
> +                   comp_type == MTK_DPI ||
> +                   comp_type == MTK_DSI) {
>                         dev_info(dev, "Adding component match for %pOF\n",
>                                  node);
>                         drm_of_component_match_add(dev, &match, compare_of,
> @@ -662,6 +665,7 @@ static struct platform_driver mtk_drm_platform_driver = {
>  static struct platform_driver * const mtk_drm_drivers[] = {
>         &mtk_disp_ccorr_driver,
>         &mtk_disp_color_driver,
> +       &mtk_disp_dsc_driver,
>         &mtk_disp_gamma_driver,
>         &mtk_disp_ovl_driver,
>         &mtk_disp_rdma_driver,
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> index 637f5669e895..8b722330ef7d 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h
> @@ -51,6 +51,7 @@ extern struct platform_driver mtk_disp_color_driver;
>  extern struct platform_driver mtk_disp_gamma_driver;
>  extern struct platform_driver mtk_disp_ovl_driver;
>  extern struct platform_driver mtk_disp_rdma_driver;
> +extern struct platform_driver mtk_disp_dsc_driver;

Alphabetic order.

Regards,
Chun-Kuang.

>  extern struct platform_driver mtk_dpi_driver;
>  extern struct platform_driver mtk_dsi_driver;
>
> --
> 2.18.0
>

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v3 02/12] dt-bindings: mediatek: display: add definition for mt8195
       [not found] ` <20210715173750.10852-3-jason-jh.lin@mediatek.com>
@ 2021-07-16  6:14   ` Fei Shao
  0 siblings, 0 replies; 5+ messages in thread
From: Fei Shao @ 2021-07-16  6:14 UTC (permalink / raw)
  To: jason-jh.lin
  Cc: chunkuang.hu, Matthias Brugger, linux-arm-kernel, linux-mediatek,
	linux-kernel, Project_Global_Chrome_Upstream_Group, nancy.lin,
	singo.chang

On Fri, Jul 16, 2021 at 1:38 AM jason-jh.lin <jason-jh.lin@mediatek.com> wrote:
>
> Add definition for mt8195 display.
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> ---
>  .../bindings/display/mediatek/mediatek,disp.yaml   | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.yaml
> index 63a6bc975b29..910bb9ce61d6 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.yaml
> @@ -54,6 +54,7 @@ properties:
>        - items:
>            - enum:
>                - mediatek,mt8192-disp-ovl
> +              - mediatek,mt8195-disp-ovl
>            - enum:
>                - mediatek,mt8183-disp-ovl
>
> @@ -82,6 +83,7 @@ properties:
>        - items:
>            - enum:
>                - mediatek,mt8192-disp-rdma
> +              - mediatek,mt8195-disp-rdma

Make mediatek,mt8195-disp-rdma an individual item to align with the dts change.

>            - enum:
>                - mediatek,mt8183-disp-rdma
>
> @@ -95,6 +97,7 @@ properties:
>        - items:
>            - enum:
>                - mediatek,mt8192-disp-ccorr
> +              - mediatek,mt8195-disp-ccorr
>            - enum:
>                - mediatek,mt8183-disp-ccorr
>
> @@ -115,6 +118,7 @@ properties:
>            - enum:
>                - mediatek,mt8183-disp-color
>                - mediatek,mt8192-disp-color
> +              - mediatek,mt8195-disp-color
>            - enum:
>                - mediatek,mt8173-disp-color
>
> @@ -124,6 +128,7 @@ properties:
>        - items:
>            - enum:
>                - mediatek,mt8192-disp-dither
> +              - mediatek,mt8195-disp-dither
>            - enum:
>                - mediatek,mt8183-disp-dither
>
> @@ -135,6 +140,7 @@ properties:
>                - mediatek,mt2712-disp-aal
>                - mediatek,mt8183-disp-aal
>                - mediatek,mt8192-disp-aal
> +              - mediatek,mt8195-disp-aal
>            - enum:
>                - mediatek,mt8173-disp-aal
>
> @@ -146,10 +152,13 @@ properties:
>        - items:
>            - enum:
>                - mediatek,mt8192-disp-gamma
> +              - mediatek,mt8195-disp-gamma
>            - enum:
>                - mediatek,mt8183-disp-gamma
>
>        # MERGE: merge streams from two RDMA sources
> +      - items:
> +          - const: mediatek,mt8195-disp-merge
>
>        # POSTMASK: control round corner for display frame
>        - items:
> @@ -209,6 +218,7 @@ properties:
>            - const: mediatek,mt8183-disp-mutex
>        - items:
>            - const: mediatek,mt8192-disp-mutex
> +          - const: mediatek,mt8195-disp-mutex
>
>        # OD: overdrive
>        - items:
> @@ -234,7 +244,7 @@ properties:
>    mediatek,larb:
>      description: The compatible property should be one of DMA function blocks,
>        such as "mediatek,<chip>-disp-ovl", "mediatek,<chip>-disp-rdma" or
> -      "mediatek,<chip>-disp-wdma". The supported chips are mt2701, mt8167 and mt8173.
> +      "mediatek,<chip>-disp-wdma". The supported chips are mt2701, mt8167, mt8173 and mt8195.
>        Should contain a phandle pointing to the local arbiter device as defined in
>        Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml.
>        It must sort according to the local arbiter index, like larb0, larb1, larb2...
> @@ -245,7 +255,7 @@ properties:
>    iommus:
>      description: The compatible property should be one of DMA function blocks,
>        such as "mediatek,<chip>-disp-ovl", "mediatek,<chip>-disp-rdma" or
> -      "mediatek,<chip>-disp-wdma". The supported chips are mt2701, mt8167 and mt8173.
> +      "mediatek,<chip>-disp-wdma". The supported chips are mt2701, mt8167, mt8173 and mt8195.
>        Should point to the respective IOMMU block with master port as argument, see
>        Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
>
> --
> 2.18.0

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v3 05/12] dt-bindings: arm: mediatek: change mmsys txt to yaml file
       [not found] ` <20210715173750.10852-6-jason-jh.lin@mediatek.com>
@ 2021-07-16  7:46   ` Fei Shao
  2021-07-16 17:42   ` Rob Herring
  1 sibling, 0 replies; 5+ messages in thread
From: Fei Shao @ 2021-07-16  7:46 UTC (permalink / raw)
  To: jason-jh.lin
  Cc: chunkuang.hu, Matthias Brugger, linux-arm-kernel, linux-mediatek,
	linux-kernel, Project_Global_Chrome_Upstream_Group, nancy.lin,
	singo.chang

On Fri, Jul 16, 2021 at 1:48 AM jason-jh.lin <jason-jh.lin@mediatek.com> wrote:
>
> Change mediatek,mmsys.txt to mediatek,mmsys.yaml
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> ---
>  .../bindings/arm/mediatek/mediatek,mmsys.txt  |  32 ------
>  .../bindings/arm/mediatek/mediatek,mmsys.yaml | 102 ++++++++++++++++++
>  2 files changed, 102 insertions(+), 32 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
> deleted file mode 100644
> index 9712a6831fab..000000000000
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
> +++ /dev/null
> @@ -1,32 +0,0 @@
> -Mediatek mmsys controller
> -============================
> -
> -The Mediatek mmsys system controller provides clock control, routing control,
> -and miscellaneous control in mmsys partition.
> -
> -Required Properties:
> -
> -- compatible: Should be one of:
> -       - "mediatek,mt2701-mmsys", "syscon"
> -       - "mediatek,mt2712-mmsys", "syscon"
> -       - "mediatek,mt6765-mmsys", "syscon"
> -       - "mediatek,mt6779-mmsys", "syscon"
> -       - "mediatek,mt6797-mmsys", "syscon"
> -       - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon"
> -       - "mediatek,mt8167-mmsys", "syscon"
> -       - "mediatek,mt8173-mmsys", "syscon"
> -       - "mediatek,mt8183-mmsys", "syscon"
> -       - "mediatek,mt8192-mmsys", "syscon"
> -- #clock-cells: Must be 1
> -
> -For the clock control, the mmsys controller uses the common clk binding from
> -Documentation/devicetree/bindings/clock/clock-bindings.txt
> -The available clocks are defined in dt-bindings/clock/mt*-clk.h.
> -
> -Example:
> -
> -mmsys: syscon@14000000 {
> -       compatible = "mediatek,mt8173-mmsys", "syscon";
> -       reg = <0 0x14000000 0 0x1000>;
> -       #clock-cells = <1>;
> -};
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> new file mode 100644
> index 000000000000..ea31c7c2792c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> @@ -0,0 +1,102 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: mediatek mmsys Controller Device Tree Bindings
> +
> +maintainers:
> +  - CK Hu <ck.hu@mediatek.com>
> +  - Jason-JH Lin <jason-jh.lin@mediatek.com>
> +
> +description: |
> +  The Mediatek mmsys system controller provides clock control, routing control,
> +  and miscellaneous control in mmsys partition.
> +
> +properties:
> +  compatible:
> +    description: |
> +      If the mmsys controller of different soc have the same function,
> +      you can use the same compatible name after it.
> +      For example, if the function of mt2701 mmsys controller is the same as syscon,
> +      then the compatible property could be set as:
> +      compatible = "mediatek,mt2701-mmsys", "syscon";
> +    oneOf:
> +      - items:
> +          - const: syscon
> +      - items:
> +          - enum:
> +              - mediatek,mt2701-mmsys
> +              - mediatek,mt7623-mmsys
> +          - enum:
> +              - syscon

Not a yaml expert but I think it's:
  - items:
    - enum:
      - mediatek,mt7623-mmsys
    - enum:
      - mediatek,mt2701-mmsys
    - enum:
      - syscon

> +      - items:
> +          - enum:
> +              - mediatek,mt2712-mmsys
> +          - enum:
> +              - syscon
> +      - items:
> +          - enum:
> +              - mediatek,mt6779-mmsys
> +          - enum:
> +              - syscon
> +      - items:
> +          - enum:
> +              - mediatek,mt6797-mmsys
> +          - enum:
> +              - syscon
> +      - items:
> +          - enum:
> +              - mediatek,mt8167-mmsys
> +          - enum:
> +              - syscon
> +      - items:
> +          - enum:
> +              - mediatek,mt8173-mmsys
> +          - enum:
> +              - syscon
> +      - items:
> +          - enum:
> +              - mediatek,mt8183-mmsys
> +          - enum:
> +              - syscon
> +      - items:
> +          - enum:
> +              - mediatek,mt8192-mmsys
> +          - enum:
> +              - syscon

Just
  - enum:
    - mediatek,mt2712-mmsys
    ...
    - mediatek,mt8192-mmsys
  - enum:
    - syscon

Fei

> +
> +  reg:
> +    maxItems: 1
> +
> +  '#clock-cells':
> +    description: |
> +      For the clock control, the mmsys controller uses the common clk binding from
> +      Documentation/devicetree/bindings/clock/clock-bindings.txt
> +      The available clocks are defined in dt-bindings/clock/mt*-clk.h
> +    const: 1
> +
> +  mboxes:
> +    description: |
> +      Client use mailbox to communicate with GCE, it should have this
> +      property and list of phandle with mailbox specifiers as defined in
> +      Documentation/devicetree/bindings/mailbox/mtk-gce.txt
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#clocks-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +
> +    mmsys: syscon@14000000 {
> +        compatible = "mediatek,mt8173-mmsys", "syscon";
> +        reg = <0 0x14000000 0 0x1000>;
> +        #clock-cells = <1>;
> +    };
> +
> +...
> --
> 2.18.0

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v3 05/12] dt-bindings: arm: mediatek: change mmsys txt to yaml file
       [not found] ` <20210715173750.10852-6-jason-jh.lin@mediatek.com>
  2021-07-16  7:46   ` [PATCH v3 05/12] dt-bindings: arm: mediatek: change mmsys txt to yaml file Fei Shao
@ 2021-07-16 17:42   ` Rob Herring
  1 sibling, 0 replies; 5+ messages in thread
From: Rob Herring @ 2021-07-16 17:42 UTC (permalink / raw)
  To: jason-jh.lin, Matthias Brugger
  Cc: Chun-Kuang Hu, linux-arm-kernel,
	moderated list:ARM/Mediatek SoC support, linux-kernel,
	Project_Global_Chrome_Upstream_Group, fshao, nancy.lin,
	singo.chang

On Thu, Jul 15, 2021 at 11:55 AM jason-jh.lin <jason-jh.lin@mediatek.com> wrote:
>
> Change mediatek,mmsys.txt to mediatek,mmsys.yaml
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> ---
>  .../bindings/arm/mediatek/mediatek,mmsys.txt  |  32 ------
>  .../bindings/arm/mediatek/mediatek,mmsys.yaml | 102 ++++++++++++++++++
>  2 files changed, 102 insertions(+), 32 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml

There's already a reviewed patch for this[1]. Not sure why it isn't applied?

Rob

[1] https://lore.kernel.org/lkml/20210519161847.3747352-1-fparent@baylibre.com/

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v3 01/12] dt-bindings: mediatek: display: change txt to yaml file
       [not found] ` <20210715173750.10852-2-jason-jh.lin@mediatek.com>
@ 2021-07-16 17:47   ` Rob Herring
  0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2021-07-16 17:47 UTC (permalink / raw)
  To: jason-jh.lin
  Cc: Chun-Kuang Hu, Matthias Brugger, linux-arm-kernel,
	moderated list:ARM/Mediatek SoC support, linux-kernel,
	Project_Global_Chrome_Upstream_Group, fshao, nancy.lin,
	singo.chang

On Thu, Jul 15, 2021 at 11:43 AM jason-jh.lin <jason-jh.lin@mediatek.com> wrote:
>
> Change mediatek,dislpay.txt to mediatek,display.yaml.
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> ---
>  .../display/mediatek/mediatek,disp.txt        | 219 ---------
>  .../display/mediatek/mediatek,disp.yaml       | 434 ++++++++++++++++++
>  2 files changed, 434 insertions(+), 219 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp.yaml

Please resend to DT list so that automated checks run and it's in my
review queue.

This is going to need to be split into a schema per block.

Rob

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2021-07-16 17:47 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <20210715173750.10852-1-jason-jh.lin@mediatek.com>
     [not found] ` <20210715173750.10852-12-jason-jh.lin@mediatek.com>
2021-07-15 23:21   ` [PATCH v3 11/12] drm/mediatek: add DSC support for MT8195 Chun-Kuang Hu
     [not found] ` <20210715173750.10852-3-jason-jh.lin@mediatek.com>
2021-07-16  6:14   ` [PATCH v3 02/12] dt-bindings: mediatek: display: add definition for mt8195 Fei Shao
     [not found] ` <20210715173750.10852-6-jason-jh.lin@mediatek.com>
2021-07-16  7:46   ` [PATCH v3 05/12] dt-bindings: arm: mediatek: change mmsys txt to yaml file Fei Shao
2021-07-16 17:42   ` Rob Herring
     [not found] ` <20210715173750.10852-2-jason-jh.lin@mediatek.com>
2021-07-16 17:47   ` [PATCH v3 01/12] dt-bindings: mediatek: display: change " Rob Herring

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).