From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752387AbbBSQNj (ORCPT ); Thu, 19 Feb 2015 11:13:39 -0500 Received: from mail-we0-f180.google.com ([74.125.82.180]:41570 "EHLO mail-we0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751996AbbBSQNe (ORCPT ); Thu, 19 Feb 2015 11:13:34 -0500 MIME-Version: 1.0 In-Reply-To: References: <1423763164-5606-1-git-send-email-mcoquelin.stm32@gmail.com> <1423763164-5606-3-git-send-email-mcoquelin.stm32@gmail.com> Date: Thu, 19 Feb 2015 17:13:32 +0100 Message-ID: Subject: Re: [PATCH 02/14] ARM: ARMv7M: Enlarge vector table to 256 entries From: Maxime Coquelin To: Rob Herring Cc: Geert Uytterhoeven , Jonathan Corbet , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Philipp Zabel , Russell King , Daniel Lezcano , Thomas Gleixner , Linus Walleij , Greg Kroah-Hartman , Jiri Slaby , Arnd Bergmann , Andrew Morton , "David S. Miller" , Mauro Carvalho Chehab , Joe Perches , Antti Palosaari , Tejun Heo , Will Deacon , Nikolay Borisov , Rusty Russell , Kees Cook , Michal Marek , "linux-doc@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-gpio@vger.kernel.org" , "linux-serial@vger.kernel.org" , Linux-Arch , "linux-api@vger.kernel.org" , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, 2015-02-15 23:42 GMT+01:00 Rob Herring : > On Fri, Feb 13, 2015 at 2:42 AM, Maxime Coquelin > wrote: >> Hi Geert, >> >> 2015-02-12 21:34 GMT+01:00 Geert Uytterhoeven : >>> On Thu, Feb 12, 2015 at 6:45 PM, Maxime Coquelin >>> wrote: >>>> From Cortex-M4 and M7 reference manuals, the nvic supports up to 240 >>>> interrupts. So the number of entries in vectors table is 256. >>>> >>>> This patch adds the missing entries, and change the alignement, so that >>>> vector_table remains naturally aligned. >>> >>> Shouldn't this depend on ARCH_STM32, or some other M4 or M7 specific >>> Kconfig option, to avoid wasting the space on other CPUs? >> >> Actually, the STM32F429 has 90 interrupts, so it would need 106 >> entries in the vector table. >> The maximum of supported interrupts is not only for Cortex-M4 and M7, >> this is also true for Cortex-M3. >> >> I see two possibilities: >> 1 - We declare the vector table for the maximum supported number of >> IRQs, as this patch does. >> - Pro: it will be functionnal with all Cortex-M MCUs >> - Con: Waste of less than 1KB for memory > > The waste depends on the alignment size as well and could be up to > almost 2KB worst case. It varies depending on the padding. We should > try to place it so it always aligned and the wasted space is > minimized. Sorry, I just notice I didn't replied to all. That was my question: Do you mean by forcing its location in the arch/arm/kernel/vmlinux.lds.S file? Regards, Maxime > > Rob > >> 2 - We introduce a config flag that provides the number of interrupts >> - Pro: No more memory waste >> - Con: Need to declare a per MCU model config flag. >> >> Then, regarding the natural alignment, is there a way to ensure it >> depending on the value of a config flag? >> Or we should keep it at the maximum value possible? >> >> Any feedback will be appreciated, especially from Uwe who maintains >> the efm32 machine. >> >> Kind regards, >> Maxime