From: Vitaly Wool <vitaly.wool@konsulko.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: linux-riscv <linux-riscv@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
Bin Meng <bin.meng@windriver.com>,
Anup Patel <anup@brainfault.org>,
Alistair Francis <alistair.francis@wdc.com>,
Palmer Dabbelt <palmerdabbelt@google.com>,
Nicolas Pitre <nico@fluxnic.net>
Subject: Re: [PATCH v3] RISC-V: enable XIP
Date: Tue, 22 Dec 2020 07:09:01 +0100 [thread overview]
Message-ID: <CAM4kBBJ8MssFvS5Lcm8wGEgF9E88NqyWD8y2SNHq6amT-0R3NQ@mail.gmail.com> (raw)
In-Reply-To: <CAEUhbmVrMEWCds2QRgnUGE4KGakxrYi6Z_EY-meyX33Fy_teoA@mail.gmail.com>
On Tue, Dec 22, 2020 at 2:44 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> Hi Vitaly,
>
> On Tue, Dec 22, 2020 at 4:39 AM Vitaly Wool <vitaly.wool@konsulko.com> wrote:
> >
> > Introduce XIP (eXecute In Place) support for RISC-V platforms.
> > It allows code to be executed directly from non-volatile storage
> > directly addressable by the CPU, such as QSPI NOR flash which can
> > be found on many RISC-V platforms. This makes way for significant
> > optimization of RAM footprint. The XIP kernel is not compressed
> > since it has to run directly from flash, so it will occupy more
> > space on the non-volatile storage to The physical flash address
> > used to link the kernel object files and for storing it has to
> > be known at compile time and is represented by a Kconfig option.
> >
> > XIP on RISC-V will currently only work on MMU-enabled kernels.
> >
> > Changed in v2:
> > - dedicated macro for XIP address fixup when MMU is not enabled yet
> > o both for 32-bit and 64-bit RISC-V
> > - SP is explicitly set to a safe place in RAM before __copy_data call
> > - removed redundant alignment requirements in vmlinux-xip.lds.S
> > - changed long -> uintptr_t typecast in __XIP_FIXUP macro.
> >
> > Changed in v3:
> > - rebased against latest for-next
> > - XIP address fixup macro now takes an argument
> > - SMP related fixes
>
> The above changelogs should go below ---
That is very fair, thanks. Will do that for v4.
~Vitaly
> > Signed-off-by: Vitaly Wool <vitaly.wool@konsulko.com>
> > ---
> > arch/riscv/Kconfig | 46 ++++++++-
> > arch/riscv/Makefile | 8 +-
> > arch/riscv/boot/Makefile | 13 +++
> > arch/riscv/include/asm/pgtable.h | 56 +++++++++--
> > arch/riscv/kernel/cpu_ops_sbi.c | 3 +
> > arch/riscv/kernel/head.S | 69 +++++++++++++-
> > arch/riscv/kernel/head.h | 3 +
> > arch/riscv/kernel/setup.c | 8 +-
> > arch/riscv/kernel/vmlinux-xip.lds.S | 132 ++++++++++++++++++++++++++
> > arch/riscv/kernel/vmlinux.lds.S | 6 ++
> > arch/riscv/mm/init.c | 142 +++++++++++++++++++++++++---
> > 11 files changed, 460 insertions(+), 26 deletions(-)
> > create mode 100644 arch/riscv/kernel/vmlinux-xip.lds.S
> >
>
> Regards,
> Bin
next prev parent reply other threads:[~2020-12-22 6:09 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-21 20:37 [PATCH v3] RISC-V: enable XIP Vitaly Wool
2020-12-22 1:44 ` Bin Meng
2020-12-22 6:09 ` Vitaly Wool [this message]
2020-12-22 5:16 ` Anup Patel
2020-12-22 10:25 ` Vitaly Wool
2020-12-22 11:26 ` Anup Patel
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