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Thu, 09 Sep 2021 06:57:04 -0700 (PDT) MIME-Version: 1.0 References: <20210904060908.1310204-1-keithp@keithp.com> <20210907220038.91021-1-keithpac@amazon.com> <20210907220038.91021-7-keithpac@amazon.com> In-Reply-To: <20210907220038.91021-7-keithpac@amazon.com> From: Ard Biesheuvel Date: Thu, 9 Sep 2021 15:56:53 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 6/7] ARM: Use TPIDRPRW for current To: Keith Packard Cc: Linux Kernel Mailing List , Abbott Liu , Andrew Morton , Andrey Ryabinin , Anshuman Khandual , Arnd Bergmann , Bjorn Andersson , Christoph Lameter , Dennis Zhou , Geert Uytterhoeven , Jens Axboe , Joe Perches , Kees Cook , Krzysztof Kozlowski , Linus Walleij , Linux ARM , Linux Memory Management List , Manivannan Sadhasivam , Marc Zyngier , Masahiro Yamada , Mike Rapoport , Nathan Chancellor , Nick Desaulniers , Nick Desaulniers , Nicolas Pitre , Russell King , Tejun Heo , Thomas Gleixner , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Valentin Schneider , Viresh Kumar , "Wolfram Sang (Renesas)" , YiFei Zhu Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 8 Sept 2021 at 00:00, Keith Packard wrote: > > Store current task pointer in CPU thread ID register TPIDRPRW so that > accessing it doesn't depend on being able to locate thread_info off of > the kernel stack pointer. > > Signed-off-by: Keith Packard > --- > arch/arm/Kconfig | 4 +++ > arch/arm/include/asm/assembler.h | 8 +++++ > arch/arm/include/asm/current.h | 52 ++++++++++++++++++++++++++++++++ > arch/arm/kernel/entry-armv.S | 4 +++ > arch/arm/kernel/setup.c | 1 + > arch/arm/kernel/smp.c | 1 + > 6 files changed, 70 insertions(+) > create mode 100644 arch/arm/include/asm/current.h > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 24804f11302d..414fe23fd5ac 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -1172,6 +1172,10 @@ config SMP_ON_UP > > If you don't know what to do here, say Y. > > +config CURRENT_POINTER_IN_TPIDRPRW > + def_bool y > + depends on (CPU_V6K || CPU_V7) && !CPU_V6 > + > config ARM_CPU_TOPOLOGY > bool "Support cpu topology definition" > depends on SMP && CPU_V7 > diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/asse= mbler.h > index e2b1fd558bf3..ea12fe3bb589 100644 > --- a/arch/arm/include/asm/assembler.h > +++ b/arch/arm/include/asm/assembler.h > @@ -209,6 +209,14 @@ > mov \rd, \rd, lsl #THREAD_SIZE_ORDER + PAGE_SHIFT > .endm > > +/* > + * Set current task_info > + * @src: Source register containing task_struct pointer > + */ > + .macro set_current src : req > + mcr p15, 0, \src, c13, c0, 4 > + .endm > + > /* > * Increment/decrement the preempt count. > */ > diff --git a/arch/arm/include/asm/current.h b/arch/arm/include/asm/curren= t.h > new file mode 100644 > index 000000000000..153a2ea18747 > --- /dev/null > +++ b/arch/arm/include/asm/current.h > @@ -0,0 +1,52 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright =C2=A9 2021 Keith Packard > + */ > + > +#ifndef _ASM_ARM_CURRENT_H_ > +#define _ASM_ARM_CURRENT_H_ > + > +#ifndef __ASSEMBLY__ > + > +register unsigned long current_stack_pointer asm ("sp"); > + > +/* > + * Same as asm-generic/current.h, except that we store current > + * in TPIDRPRW. TPIDRPRW only exists on V6K and V7 > + */ > +#ifdef CONFIG_CURRENT_POINTER_IN_TPIDRPRW > + > +struct task_struct; > + > +static inline void set_current(struct task_struct *tsk) > +{ > + /* Set TPIDRPRW */ > + asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (tsk) : "memory= "); > +} > + > +static __always_inline struct task_struct *get_current(void) > +{ > + struct task_struct *tsk; > + > + /* > + * Read TPIDRPRW. > + * We want to allow caching the value, so avoid using volatile an= d > + * instead use a fake stack read to hazard against barrier(). > + */ > + asm("mrc p15, 0, %0, c13, c0, 4" : "=3Dr" (tsk) > + : "Q" (*(const unsigned long *)current_stack_pointer)); > + > + return tsk; > +} > +#define current get_current() > +#else > + > +#define set_current(tsk) do {} while (0) > + > +#include > + > +#endif /* CONFIG_SMP */ > + > +#endif /* __ASSEMBLY__ */ > + > +#endif /* _ASM_ARM_CURRENT_H_ */ > diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S > index 0ea8529a4872..db3947ee9c3e 100644 > --- a/arch/arm/kernel/entry-armv.S > +++ b/arch/arm/kernel/entry-armv.S > @@ -761,6 +761,10 @@ ENTRY(__switch_to) > ldr r6, [r2, #TI_CPU_DOMAIN] > #endif > switch_tls r1, r4, r5, r3, r7 > +#ifdef CONFIG_CURRENT_POINTER_IN_TPIDRPRW > + ldr r7, [r2, #TI_TASK] > + set_current r7 > +#endif This is too early: this will cause the thread notification hooks to be called with current pointing to the new task instead of the old one. > #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP) > ldr r7, [r2, #TI_TASK] > ldr r8, =3D__stack_chk_guard > diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c > index d0dc60afe54f..2fdf8c31d6c9 100644 > --- a/arch/arm/kernel/setup.c > +++ b/arch/arm/kernel/setup.c > @@ -586,6 +586,7 @@ void __init smp_setup_processor_id(void) > u32 mpidr =3D is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK = : 0; > u32 cpu =3D MPIDR_AFFINITY_LEVEL(mpidr, 0); > > + set_current(&init_task); > cpu_logical_map(0) =3D cpu; > for (i =3D 1; i < nr_cpu_ids; ++i) > cpu_logical_map(i) =3D i =3D=3D cpu ? 0 : i; > diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c > index 8ccf10b34f08..09771916442a 100644 > --- a/arch/arm/kernel/smp.c > +++ b/arch/arm/kernel/smp.c > @@ -410,6 +410,7 @@ asmlinkage void secondary_start_kernel(unsigned int c= pu, struct task_struct *tas > { > struct mm_struct *mm =3D &init_mm; > > + set_current(task); > secondary_biglittle_init(); > > /* > -- > 2.33.0 >