From: Ard Biesheuvel <ardb@kernel.org>
To: David Laight <David.Laight@aculab.com>
Cc: Frederic Weisbecker <frederic@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
LKML <linux-kernel@vger.kernel.org>,
James Morse <james.morse@arm.com>,
Quentin Perret <qperret@google.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH 2/4] arm64: implement support for static call trampolines
Date: Mon, 25 Oct 2021 16:31:34 +0200 [thread overview]
Message-ID: <CAMj1kXGuVdSVe29WoensbxC5fqp4HFQeBK2-oLxHA_BQLp2jww@mail.gmail.com> (raw)
In-Reply-To: <1b19fbeccf3d4a75a5ed3a507d29f7dd@AcuMS.aculab.com>
On Mon, 25 Oct 2021 at 16:25, David Laight <David.Laight@aculab.com> wrote:
>
> From: Frederic Weisbecker
> > Sent: 25 October 2021 13:21
> >
> > Implement arm64 support for the 'unoptimized' static call variety, which
> > routes all calls through a single trampoline that is patched to perform a
> > tail call to the selected function.
> >
> > It is expected that the direct branch instruction will be able to cover
> > the common case. However, given that static call targets may be located
> > in modules loaded out of direct branching range, we need a fallback path
> > that loads the address into R16 and uses a branch-to-register (BR)
> > instruction to perform an indirect call.
> >
> ...
> > +void arch_static_call_transform(void *site, void *tramp, void *func, bool tail)
> > +{
> > + /*
> > + * -0x8 <literal>
> > + * 0x0 bti c <--- trampoline entry point
> > + * 0x4 <branch or nop>
> > + * 0x8 ldr x16, <literal>
> > + * 0xc cbz x16, 20
> > + * 0x10 br x16
> > + * 0x14 ret
> > + */
>
> Since the 'ldr x16, <literal>' is just a 32bit constant
> (for a pc-relative load).
>
I don't follow. Are you saying it is a 32-bit opcode? This applies to
all AArch64 opcodes.
> Can't you save a word by making offset 0x4 <branch or ldr x16, <literal>> ?
>
> Or am I missing something?
>
On arm64, we can only patch NOPs into branch instructions or vice
versa, or we'd have to run the whole thing under stop_machine() to
ensure that other cores don't fetch garbage.
next prev parent reply other threads:[~2021-10-25 14:31 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-25 12:20 [PATCH 0/4] arm64: Support dynamic preemption v2 Frederic Weisbecker
2021-10-25 12:20 ` [PATCH 1/4] sched/preempt: Prepare for supporting !CONFIG_GENERIC_ENTRY dynamic preemption Frederic Weisbecker
2021-10-25 12:21 ` [PATCH 2/4] arm64: implement support for static call trampolines Frederic Weisbecker
2021-10-25 13:56 ` Peter Zijlstra
2021-10-25 14:08 ` Ard Biesheuvel
2021-10-25 14:19 ` Peter Zijlstra
2021-10-25 14:44 ` Peter Zijlstra
2021-10-25 14:55 ` Ard Biesheuvel
2021-10-25 15:03 ` Peter Zijlstra
2021-10-25 15:10 ` Ard Biesheuvel
2021-10-26 10:36 ` Mark Rutland
2021-10-26 10:45 ` Peter Zijlstra
2021-10-26 11:06 ` David Laight
2021-10-27 12:47 ` Mark Rutland
2021-10-25 15:03 ` David Laight
2021-10-25 14:25 ` David Laight
2021-10-25 14:31 ` Ard Biesheuvel [this message]
2021-10-25 14:38 ` David Laight
2021-10-25 12:21 ` [PATCH 3/4] arm64: Implement IRQ exit preemption static call for dynamic preemption Frederic Weisbecker
2021-10-25 12:21 ` [PATCH 4/4] arm64: Implement HAVE_PREEMPT_DYNAMIC Frederic Weisbecker
-- strict thread matches above, loose matches on Subject: below --
2021-09-20 23:32 [PATCH 0/4] arm64: Support dynamic preemption Frederic Weisbecker
2021-09-20 23:32 ` [PATCH 2/4] arm64: implement support for static call trampolines Frederic Weisbecker
2021-09-21 7:09 ` Peter Zijlstra
2021-09-21 14:44 ` Ard Biesheuvel
2021-09-21 15:08 ` Peter Zijlstra
2021-09-21 15:33 ` Mark Rutland
2021-09-21 15:55 ` Ard Biesheuvel
2021-09-21 16:28 ` Mark Rutland
2021-09-25 17:46 ` David Laight
2021-09-27 8:58 ` Mark Rutland
2021-09-21 16:10 ` Ard Biesheuvel
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