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From: Peter Gonda <pgonda@google.com>
To: Nikunj A Dadhania <nikunj@amd.com>
Cc: linux-kernel@vger.kernel.org, thomas.lendacky@amd.com,
	x86@kernel.org, kvm@vger.kernel.org, bp@alien8.de,
	mingo@redhat.com, tglx@linutronix.de,
	dave.hansen@linux.intel.com, dionnaglaze@google.com,
	seanjc@google.com, pbonzini@redhat.com
Subject: Re: [PATCH v6 00/16] Add Secure TSC support for SNP guests
Date: Wed, 6 Dec 2023 10:46:43 -0700	[thread overview]
Message-ID: <CAMkAt6pULjLVUO6Ys4Sq1a79d93_5w5URgLYNXY-aW2jSemruA@mail.gmail.com> (raw)
In-Reply-To: <20231128125959.1810039-1-nikunj@amd.com>

On Tue, Nov 28, 2023 at 6:00 AM Nikunj A Dadhania <nikunj@amd.com> wrote:
>
> Secure TSC allows guests to securely use RDTSC/RDTSCP instructions as the
> parameters being used cannot be changed by hypervisor once the guest is
> launched. More details in the AMD64 APM Vol 2, Section "Secure TSC".
>
> During the boot-up of the secondary cpus, SecureTSC enabled guests need to
> query TSC info from AMD Security Processor. This communication channel is
> encrypted between the AMD Security Processor and the guest, the hypervisor
> is just the conduit to deliver the guest messages to the AMD Security
> Processor. Each message is protected with an AEAD (AES-256 GCM). See "SEV
> Secure Nested Paging Firmware ABI Specification" document (currently at
> https://www.amd.com/system/files/TechDocs/56860.pdf) section "TSC Info"
>
> Use a minimal GCM library to encrypt/decrypt SNP Guest messages to
> communicate with the AMD Security Processor which is available at early
> boot.
>
> SEV-guest driver has the implementation for guest and AMD Security
> Processor communication. As the TSC_INFO needs to be initialized during
> early boot before smp cpus are started, move most of the sev-guest driver
> code to kernel/sev.c and provide well defined APIs to the sev-guest driver
> to use the interface to avoid code-duplication.
>
> Patches:
> 01-08: Preparation and movement of sev-guest driver code
> 09-16: SecureTSC enablement patches.
>
> Testing SecureTSC
> -----------------
>
> SecureTSC hypervisor patches based on top of SEV-SNP Guest MEMFD series:
> https://github.com/nikunjad/linux/tree/snp-host-latest-securetsc_v5
>
> QEMU changes:
> https://github.com/nikunjad/qemu/tree/snp_securetsc_v5
>
> QEMU commandline SEV-SNP-UPM with SecureTSC:
>
>   qemu-system-x86_64 -cpu EPYC-Milan-v2,+secure-tsc,+invtsc -smp 4 \
>     -object memory-backend-memfd-private,id=ram1,size=1G,share=true \
>     -object sev-snp-guest,id=sev0,cbitpos=51,reduced-phys-bits=1,secure-tsc=on \
>     -machine q35,confidential-guest-support=sev0,memory-backend=ram1,kvm-type=snp \
>     ...

Thanks Nikunj!

I was able to modify my SNP host kernel to support SecureTSC based off
of your `snp-host-latest-securetsc_v5` and use that to test this
series. Seemed to work as intended in the happy path but I didn't
spend much time trying any corner cases. Also checked the series
continues to work without SecureTSC enabled for the V.

Tested-by: Peter Gonda <pgonda@google.com>

      parent reply	other threads:[~2023-12-06 17:47 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-28 12:59 [PATCH v6 00/16] Add Secure TSC support for SNP guests Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 01/16] virt: sev-guest: Use AES GCM crypto library Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 02/16] virt: sev-guest: Move mutex to SNP guest device structure Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 03/16] virt: sev-guest: Replace dev_dbg with pr_debug Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 04/16] virt: sev-guest: Add SNP guest request structure Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 05/16] virt: sev-guest: Add vmpck_id to snp_guest_dev struct Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 06/16] x86/sev: Cache the secrets page address Nikunj A Dadhania
2023-12-06 22:21   ` Dionna Amalie Glaze
2023-12-07  6:06     ` Nikunj A. Dadhania
2023-11-28 12:59 ` [PATCH v6 07/16] x86/sev: Move and reorganize sev guest request api Nikunj A Dadhania
2023-11-28 22:50   ` kernel test robot
2023-11-29  2:40   ` kernel test robot
2023-12-05 17:13   ` Dionna Amalie Glaze
2023-12-06  4:24     ` Nikunj A. Dadhania
2023-11-28 12:59 ` [PATCH v6 08/16] x86/mm: Add generic guest initialization hook Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 09/16] x86/cpufeatures: Add synthetic Secure TSC bit Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 10/16] x86/sev: Add Secure TSC support for SNP guests Nikunj A Dadhania
2023-11-29  4:08   ` kernel test robot
2023-11-28 12:59 ` [PATCH v6 11/16] x86/sev: Change TSC MSR behavior for Secure TSC enabled guests Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 12/16] x86/sev: Prevent RDTSC/RDTSCP interception " Nikunj A Dadhania
2023-12-05 17:16   ` Dionna Amalie Glaze
2023-12-06  4:37     ` Nikunj A. Dadhania
2023-12-06 18:45       ` Dionna Amalie Glaze
2023-12-07  6:12         ` Nikunj A. Dadhania
2023-11-28 12:59 ` [PATCH v6 13/16] x86/kvmclock: Skip kvmclock when Secure TSC is available Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 14/16] x86/sev: Mark Secure TSC as reliable Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 15/16] x86/cpu/amd: Do not print FW_BUG for Secure TSC Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 16/16] x86/sev: Enable Secure TSC for SNP guests Nikunj A Dadhania
2023-12-06 17:46 ` Peter Gonda [this message]

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