From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Conor Dooley <Conor.Dooley@microchip.com>
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Jassi Brar" <jassisinghbrar@gmail.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alessandro Zummo" <a.zummo@towertech.it>,
"Alexandre Belloni" <alexandre.belloni@bootlin.com>,
"Mark Brown" <broonie@kernel.org>,
"Greg KH" <gregkh@linuxfoundation.org>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Lee Jones" <lee.jones@linaro.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
"Linux I2C" <linux-i2c@vger.kernel.org>,
"Linux PWM List" <linux-pwm@vger.kernel.org>,
linux-riscv <linux-riscv@lists.infradead.org>,
"Linux Crypto Mailing List" <linux-crypto@vger.kernel.org>,
linux-rtc@vger.kernel.org, linux-spi <linux-spi@vger.kernel.org>,
"USB list" <linux-usb@vger.kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski@canonical.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Lewis Hanly" <Lewis.Hanly@microchip.com>,
Daire.McNamara@microchip.com, Ivan.Griffin@microchip.com,
"Atish Patra" <atishp@atishpatra.org>
Subject: Re: [PATCH v2 14/17] riscv: dts: microchip: add fpga fabric section to icicle kit
Date: Fri, 17 Dec 2021 17:00:58 +0100 [thread overview]
Message-ID: <CAMuHMdUiSnxmXFroHi1drcmkqkhshC+X=6mtw0_wFnS+P=O9Cw@mail.gmail.com> (raw)
In-Reply-To: <11333b59-733c-186f-3708-7357f72d7bef@microchip.com>
Hi Conor,
On Fri, Dec 17, 2021 at 4:32 PM <Conor.Dooley@microchip.com> wrote:
> On 17/12/2021 13:43, Geert Uytterhoeven wrote:
> > On Fri, Dec 17, 2021 at 10:33 AM <conor.dooley@microchip.com> wrote:
> >> From: Conor Dooley <conor.dooley@microchip.com>
> >>
> >> Split the device tree for the Microchip MPFS into two sections by adding
> >> microchip-mpfs-fabric.dtsi, which contains peripherals contained in the
> >> FPGA fabric.
> >>
> >> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> >
> > Thanks for your patch!
> >
> >> --- /dev/null
> >> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
> >> @@ -0,0 +1,13 @@
> >> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> >> +/* Copyright (c) 2020-2021 Microchip Technology Inc */
> >> +
> >> +/ {
> >> + corePWM0: pwm@41000000 {
> >> + compatible = "microchip,corepwm";
> >> + reg = <0x0 0x41000000 0x0 0xF0>;
> >> + microchip,sync-update = /bits/ 8 <0>;
> >> + #pwm-cells = <2>;
> >> + clocks = <&clkcfg CLK_FIC3>;
> >> + status = "disabled";
> >> + };
> >
> > I'm wondering if these should be grouped under a "fabric" subnode,
> > like we have an "soc" subnode for on-SoC devices? Rob?
> >
> > BTW, do you already have a naming plan for different revisions of
> > FPGA fabric cores?
> Not yet (assuming you mean specifically how we will handle it in the
> device tree) - although i was talking to someone about it yesterday.
> It's possible that we might handle that via a register, but if you have
> a suggestion or some precedence that you're aware of that would be useful.
>
> The actual naming convention of the IP cores themselves, yeah. I will
> dig it up for you on Monday.
I meant what if corepwm is enhanced, and how to detect that?
SiFive uses an integer version number, even for hard cores[1].
OpenCores uses an "-rtlsvnN" suffix (isn't svn dead? ;-)
No idea what e.g. LiteX and Microwatt are planning.
[1] Documentation/devicetree/bindings/sifive/sifive-blocks-ip-versioning.txt
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2021-12-17 16:01 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-17 9:33 [PATCH v2 00/17] Update the Icicle Kit device tree conor.dooley
2021-12-17 9:33 ` [PATCH v2 01/17] dt-bindings: interrupt-controller: create a header for RISC-V interrupts conor.dooley
2021-12-21 17:47 ` Rob Herring
2021-12-17 9:33 ` [PATCH v2 02/17] dt-bindings: soc/microchip: update syscontroller compatibles conor.dooley
2021-12-17 13:24 ` Geert Uytterhoeven
2021-12-17 14:21 ` Rob Herring
2021-12-17 9:33 ` [PATCH v2 03/17] dt-bindings: soc/microchip: make systemcontroller a mfd conor.dooley
2021-12-21 17:55 ` Rob Herring
2021-12-21 23:50 ` conor dooley
2021-12-17 9:33 ` [PATCH v2 04/17] mailbox: change mailbox-mpfs compatible string conor.dooley
2021-12-17 13:25 ` Geert Uytterhoeven
2021-12-17 9:33 ` [PATCH v2 05/17] dt-bindings: i2c: add bindings for microchip mpfs i2c conor.dooley
2021-12-17 14:21 ` Rob Herring
2021-12-17 9:33 ` [PATCH v2 06/17] dt-bindings: rng: add bindings for microchip mpfs rng conor.dooley
2021-12-17 14:53 ` Krzysztof Kozlowski
2021-12-17 15:07 ` Krzysztof Kozlowski
2021-12-17 15:22 ` Conor.Dooley
2021-12-17 15:47 ` Krzysztof Kozlowski
2021-12-17 16:26 ` conor dooley
2021-12-17 9:33 ` [PATCH v2 07/17] dt-bindings: rtc: add bindings for microchip mpfs rtc conor.dooley
2021-12-17 14:21 ` Rob Herring
2021-12-20 14:37 ` Rob Herring
2021-12-17 9:33 ` [PATCH v2 08/17] dt-bindings: soc/microchip: add bindings for mpfs system services conor.dooley
2021-12-17 9:33 ` [PATCH v2 09/17] dt-bindings: gpio: add bindings for microchip mpfs gpio conor.dooley
2021-12-17 14:21 ` Rob Herring
2021-12-17 9:33 ` [PATCH v2 10/17] dt-bindings: spi: add bindings for microchip mpfs spi conor.dooley
2021-12-17 11:17 ` Mark Brown
2021-12-17 11:40 ` Conor.Dooley
2021-12-17 11:43 ` Mark Brown
2021-12-20 8:05 ` Conor.Dooley
2021-12-17 14:21 ` Rob Herring
2021-12-17 9:33 ` [PATCH v2 11/17] dt-bindings: usb: add bindings for microchip mpfs musb conor.dooley
2021-12-17 14:21 ` Rob Herring
2021-12-21 13:32 ` Rob Herring
2021-12-17 9:33 ` [PATCH v2 12/17] dt-bindings: pwm: add microchip corePWM binding conor.dooley
2021-12-17 14:21 ` Rob Herring
2021-12-17 14:58 ` Krzysztof Kozlowski
2021-12-17 9:33 ` [PATCH v2 13/17] riscv: dts: microchip: use hart and clk defines for icicle kit conor.dooley
2021-12-17 13:40 ` Geert Uytterhoeven
2021-12-17 9:33 ` [PATCH v2 14/17] riscv: dts: microchip: add fpga fabric section to " conor.dooley
2021-12-17 13:43 ` Geert Uytterhoeven
2021-12-17 15:32 ` Conor.Dooley
2021-12-17 16:00 ` Geert Uytterhoeven [this message]
2022-01-12 9:38 ` Conor.Dooley
2022-01-14 13:35 ` Conor.Dooley
2021-12-17 14:59 ` Krzysztof Kozlowski
2021-12-17 9:33 ` [PATCH v2 15/17] riscv: dts: microchip: refactor icicle kit device tree conor.dooley
2021-12-17 15:04 ` Krzysztof Kozlowski
2021-12-17 15:23 ` Conor.Dooley
2021-12-17 9:33 ` [PATCH v2 16/17] riscv: dts: microchip: update peripherals in " conor.dooley
2021-12-17 9:33 ` [PATCH v2 17/17] MAINTAINERS: update riscv/microchip entry conor.dooley
2021-12-17 15:09 ` Krzysztof Kozlowski
2021-12-23 14:56 ` Conor.Dooley
2021-12-23 17:36 ` Palmer Dabbelt
2022-01-12 13:32 ` Lewis.Hanly
2021-12-17 9:48 ` [PATCH v2 00/17] Update the Icicle Kit device tree Geert Uytterhoeven
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAMuHMdUiSnxmXFroHi1drcmkqkhshC+X=6mtw0_wFnS+P=O9Cw@mail.gmail.com' \
--to=geert@linux-m68k.org \
--cc=Conor.Dooley@microchip.com \
--cc=Daire.McNamara@microchip.com \
--cc=Ivan.Griffin@microchip.com \
--cc=Lewis.Hanly@microchip.com \
--cc=a.zummo@towertech.it \
--cc=alexandre.belloni@bootlin.com \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@atishpatra.org \
--cc=bgolaszewski@baylibre.com \
--cc=bin.meng@windriver.com \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=heiko@sntech.de \
--cc=jassisinghbrar@gmail.com \
--cc=krzysztof.kozlowski@canonical.com \
--cc=lee.jones@linaro.org \
--cc=linus.walleij@linaro.org \
--cc=linux-crypto@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-i2c@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pwm@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-rtc@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=linux-usb@vger.kernel.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=thierry.reding@gmail.com \
--cc=u.kleine-koenig@pengutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).