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[209.85.210.42]) by smtp.gmail.com with ESMTPSA id i12-20020a056830010c00b0060aea5bbc87sm3994359otp.18.2022.05.23.07.22.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 May 2022 07:22:34 -0700 (PDT) Received: by mail-ot1-f42.google.com with SMTP id g13-20020a9d6b0d000000b0060b13026e0dso2197689otp.8; Mon, 23 May 2022 07:22:33 -0700 (PDT) X-Received: by 2002:a25:e04d:0:b0:64d:6f23:b906 with SMTP id x74-20020a25e04d000000b0064d6f23b906mr21745041ybg.380.1653315743376; Mon, 23 May 2022 07:22:23 -0700 (PDT) MIME-Version: 1.0 References: <20220522155046.260146-1-tmaimon77@gmail.com> <20220522155046.260146-12-tmaimon77@gmail.com> <86cd6a37-70ad-3a90-bc8a-dcd8b41f1175@linaro.org> In-Reply-To: From: Geert Uytterhoeven Date: Mon, 23 May 2022 16:22:12 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v1 11/19] dt-bindings: reset: npcm: Add support for NPCM8XX To: Tomer Maimon Cc: Krzysztof Kozlowski , Avi Fishman , Tali Perry , Joel Stanley , Patrick Venture , Nancy Yuen , Benjamin Fair , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Philipp Zabel , Greg KH , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Arnd Bergmann , Olof Johansson , Jiri Slaby , Shawn Guo , =?UTF-8?Q?Bj=C3=B6rn_Andersson?= , Geert Uytterhoeven , Marcel Ziswiler , Vinod Koul , Biju Das , Nobuhiro Iwamatsu , Robert Hancock , =?UTF-8?Q?Jonathan_Neusch=C3=A4fer?= , Lubomir Rintel , arm-soc , devicetree , Linux Kernel Mailing List , linux-clk , "open list:SERIAL DRIVERS" , Linux Watchdog Mailing List , Linux ARM Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Tomer, On Mon, May 23, 2022 at 4:03 PM Tomer Maimon wrote: > On Mon, 23 May 2022 at 12:01, Krzysztof Kozlowski wrote: >> On 22/05/2022 17:50, Tomer Maimon wrote: >> > Add binding document and device tree binding >> > constants for Nuvoton BMC NPCM8XX reset controller. >> > >> > Signed-off-by: Tomer Maimon >> > --- /dev/null >> > +++ b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h >> > @@ -0,0 +1,124 @@ >> > +/* SPDX-License-Identifier: GPL-2.0 */ >> > +// Copyright (c) 2022 Nuvoton Technology corporation. >> > + >> > +#ifndef _DT_BINDINGS_NPCM8XX_RESET_H >> > +#define _DT_BINDINGS_NPCM8XX_RESET_H >> > + >> > +#define NPCM8XX_RESET_IPSRST1 0x20 >> > +#define NPCM8XX_RESET_IPSRST2 0x24 >> > +#define NPCM8XX_RESET_IPSRST3 0x34 >> > +#define NPCM8XX_RESET_IPSRST4 0x74 >> >> What are these? All IDs should be incremental, decimal and start from 0. > > Register offset, we use the same method in NPCM7xx. please refer > https://elixir.bootlin.com/linux/v5.18/source/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h > > and the driver asserts the reset according to the reset include definitions So if they're easy to look up the values, you could do without the definitions? Cfr. the interrupts properties in .dtsi files, where we typically just use the hardcoded numbers. If you do decide to keep them, a comment explaining their origins would be useful. >> > + >> > +/* Reset lines on IP1 reset module (NPCM8XX_RESET_IPSRST1) */ >> > +#define NPCM8XX_RESET_GDMA0 3 >> >> IDs start from 0 and do not have holes. > > This represents the reset BIT in the reset register. Likewise, I think it's a good idea to document that in a comment, cfr. https://elixir.bootlin.com/linux/v5.18/source/include/dt-bindings/power/r8a7795-sysc.h#L8 Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds