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[209.85.128.175]) by smtp.gmail.com with ESMTPSA id q15-20020ac8450f000000b003447ee0a6bfsm8679127qtn.17.2022.08.22.04.40.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 22 Aug 2022 04:40:24 -0700 (PDT) Received: by mail-yw1-f175.google.com with SMTP id 00721157ae682-3321c2a8d4cso284570947b3.5; Mon, 22 Aug 2022 04:40:24 -0700 (PDT) X-Received: by 2002:a5b:bcd:0:b0:68f:b4c0:7eca with SMTP id c13-20020a5b0bcd000000b0068fb4c07ecamr18713118ybr.202.1661168424232; Mon, 22 Aug 2022 04:40:24 -0700 (PDT) MIME-Version: 1.0 References: <20220815050815.22340-1-samuel@sholland.org> <5593349.DvuYhMxLoT@jernej-laptop> <3881930.ZaRXLXkqSa@diego> <2249129.ElGaqSPkdT@jernej-laptop> In-Reply-To: <2249129.ElGaqSPkdT@jernej-laptop> From: Geert Uytterhoeven Date: Mon, 22 Aug 2022 13:40:12 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 06/12] riscv: dts: allwinner: Add the D1 SoC base devicetree To: =?UTF-8?Q?Jernej_=C5=A0krabec?= Cc: Samuel Holland , Chen-Yu Tsai , linux-sunxi@lists.linux.dev, Palmer Dabbelt , Paul Walmsley , Albert Ou , linux-riscv , Krzysztof Kozlowski , =?UTF-8?Q?Heiko_St=C3=BCbner?= , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , Krzysztof Kozlowski Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jernej, On Tue, Aug 16, 2022 at 11:28 AM Jernej Škrabec wrote: > Dne torek, 16. avgust 2022 ob 11:12:05 CEST je Heiko Stübner napisal(a): > > Am Dienstag, 16. August 2022, 09:49:58 CEST schrieb Jernej Škrabec: > > > Dne torek, 16. avgust 2022 ob 09:41:45 CEST je Krzysztof Kozlowski > napisal(a): > > > > On 15/08/2022 08:08, Samuel Holland wrote: > > > > > + > > > > > + de: display-engine { > > > > > + compatible = "allwinner,sun20i-d1-display-engine"; > > > > > + allwinner,pipelines = <&mixer0>, <&mixer1>; > > > > > + status = "disabled"; > > > > > + }; > > > > > + > > > > > + osc24M: osc24M-clk { > > > > > > > > lowercase > > > > > > > > > + compatible = "fixed-clock"; > > > > > + clock-frequency = <24000000>; > > > > > > > > This is a property of the board, not SoC. > > > > > > SoC needs 24 MHz oscillator for correct operation, so each and every board > > > has it. Having it here simplifies board DT files. > > > > I guess the oscillator is a separate component on each board, right? > > Correct. > > > And DT obvious is meant to describe the hardware - independently from > > implementation-specific choices. > > There is no choice in this case. 24 MHz crystal has to be present. > > FWIW, including crystal node in SoC specific DTSI is already common pattern in > Allwinner ARM SoC DTSI files. I could also be a programmable clock generator on the board, programmed to generate a 24 MHz clock on one of its outputs? Again, on the board. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds