From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA4AAC433F5 for ; Mon, 23 May 2022 13:59:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236753AbiEWN7C (ORCPT ); Mon, 23 May 2022 09:59:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236604AbiEWN66 (ORCPT ); Mon, 23 May 2022 09:58:58 -0400 Received: from mail-qv1-f50.google.com (mail-qv1-f50.google.com [209.85.219.50]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E46DE5712F; Mon, 23 May 2022 06:58:55 -0700 (PDT) Received: by mail-qv1-f50.google.com with SMTP id l1so12145540qvh.1; Mon, 23 May 2022 06:58:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=fYWALA3lJgoSN00lrVAVMkJgNm+QYBYbKEt1Mc7Ujl4=; b=cLcoPu+jy2A84xyELl+PC8QHKnEQom/uR+IZrlblq4jaAQdX5bwIx+YC+v8UuYkKbO euvE1owgn5zLGtmYzYKXgXzxoeWkhKISf0CnKf7QAE41WV4i9EfX0aMu8P1ObNUbTpJS Bfp3V0VEf7XvxdyFrIYwTVHaQa5GAv8h/v/MicPbw5w+mqNHeGRfpXMoK9a29mFBc6Z4 WJRHy5d10mxvg+WlGgczVPvWGaCwMx3KxcpsN5rZJHKzCLOCyeb8ugHCiJRP9Ob4uGQW M56BlHBCN2Mjgdd5lrws+XYa42sgUDRCXkO0fMl0ddeHqdMkB6+UNj3dZpuf5qtRnjSf LRhQ== X-Gm-Message-State: AOAM530F1GbidAqKZCIzTYHIgQ6K9C64jufU3iPVo6W+yrRev/4xSHJV YFS9Kjf5eYBHSkeisttj96rABJShdxRJzw== X-Google-Smtp-Source: ABdhPJxn+zxXbkpHwy/aXTGgQgtstkKudNX1BtloONutSOmdlVuT2flBdrV+6ozu5wuVLi91JmXlCg== X-Received: by 2002:ad4:5de6:0:b0:462:180d:7038 with SMTP id jn6-20020ad45de6000000b00462180d7038mr10559956qvb.16.1653314334747; Mon, 23 May 2022 06:58:54 -0700 (PDT) Received: from mail-yb1-f171.google.com (mail-yb1-f171.google.com. [209.85.219.171]) by smtp.gmail.com with ESMTPSA id bi12-20020a05620a318c00b006a370031c3esm3792652qkb.106.2022.05.23.06.58.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 May 2022 06:58:54 -0700 (PDT) Received: by mail-yb1-f171.google.com with SMTP id q135so25551127ybg.10; Mon, 23 May 2022 06:58:53 -0700 (PDT) X-Received: by 2002:a81:234b:0:b0:2f8:4082:bbd3 with SMTP id j72-20020a81234b000000b002f84082bbd3mr23570342ywj.47.1653314322494; Mon, 23 May 2022 06:58:42 -0700 (PDT) MIME-Version: 1.0 References: <20220522155046.260146-1-tmaimon77@gmail.com> <20220522155046.260146-18-tmaimon77@gmail.com> In-Reply-To: From: Geert Uytterhoeven Date: Mon, 23 May 2022 15:58:31 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v1 17/19] arm64: dts: nuvoton: Add initial NPCM8XX device tree To: Krzysztof Kozlowski Cc: Tomer Maimon , Avi Fishman , Tali Perry , Joel Stanley , Patrick Venture , Nancy Yuen , Benjamin Fair , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Stephen Boyd , Philipp Zabel , Greg KH , Daniel Lezcano , Thomas Gleixner , Wim Van Sebroeck , Guenter Roeck , Catalin Marinas , Will Deacon , Arnd Bergmann , Olof Johansson , Jiri Slaby , Shawn Guo , =?UTF-8?Q?Bj=C3=B6rn_Andersson?= , Geert Uytterhoeven , Marcel Ziswiler , Vinod , Biju Das , Nobuhiro Iwamatsu , Robert Hancock , =?UTF-8?Q?Jonathan_Neusch=C3=A4fer?= , Lubomir Rintel , arm-soc , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , linux-clk , "open list:SERIAL DRIVERS" , Linux Watchdog Mailing List , Linux ARM Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Krzysztof, On Mon, May 23, 2022 at 11:08 AM Krzysztof Kozlowski wrote: > On 22/05/2022 17:50, Tomer Maimon wrote: > > This adds initial device tree support for the > > Nuvoton NPCM845 Board Management controller (BMC) SoC family. > > Thank you for your patch. There is something to discuss/improve. > > > The NPCM845 based quad-core Cortex-A35 ARMv8 architecture and > > have various peripheral IPs. > > > > Signed-off-by: Tomer Maimon > > + l2: l2-cache { > > + compatible = "cache"; > > Is this a real compatible? What bindings are you using here? The compatible value and related properties are defined in the Devicetree Specification, v0.4-rc1, Section 3.9 ("Multi-level and Shared Cache Nodes (/cpus/cpu*/l?-cache)"). The properties are handled by dtschema/schemas/cache-controller.yaml, but the latter seems to lack any checking on the compatible value? Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds