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[209.85.128.174]) by smtp.gmail.com with ESMTPSA id p6-20020a05620a22e600b0069fc13ce250sm1041292qki.129.2022.05.25.04.46.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 May 2022 04:46:54 -0700 (PDT) Received: by mail-yw1-f174.google.com with SMTP id 00721157ae682-300312ba5e2so45534747b3.0; Wed, 25 May 2022 04:46:53 -0700 (PDT) X-Received: by 2002:a81:234b:0:b0:2f8:4082:bbd3 with SMTP id j72-20020a81234b000000b002f84082bbd3mr32969304ywj.47.1653479213622; Wed, 25 May 2022 04:46:53 -0700 (PDT) MIME-Version: 1.0 References: <20220524172214.5104-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20220524172214.5104-3-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Wed, 25 May 2022 13:46:41 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH RFC 2/2] irqchip/sifive-plic: Add support for Renesas RZ/Five SoC To: "Lad, Prabhakar" Cc: Lad Prabhakar , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Sagar Kadam , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-riscv , Geert Uytterhoeven , Linux Kernel Mailing List , Linux-Renesas , Phil Edworthy , Biju Das Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Prabhakar, On Wed, May 25, 2022 at 11:43 AM Lad, Prabhakar wrote: > On Wed, May 25, 2022 at 10:35 AM Geert Uytterhoeven > wrote: > > On Wed, May 25, 2022 at 11:01 AM Lad, Prabhakar > > wrote: > > > On Wed, May 25, 2022 at 9:01 AM Geert Uytterhoeven wrote: > > > > On Tue, May 24, 2022 at 7:22 PM Lad Prabhakar > > > > wrote: > > > > > The Renesas RZ/Five SoC has a RISC-V AX45MP AndesCore with NCEPLIC100. The > > > > > NCEPLIC100 supports both edge-triggered and level-triggered interrupts. In > > > > > case of edge-triggered interrupts NCEPLIC100 ignores the next interrupt > > > > > edge until the previous completion message has been received and > > > > > NCEPLIC100 doesn't support pending interrupt counter, hence losing the > > > > > interrupts if not acknowledged in time. > > > > > > > > > > So the workaround for edge-triggered interrupts to be handled correctly > > > > > and without losing is that it needs to be acknowledged first and then > > > > > handler must be run so that we don't miss on the next edge-triggered > > > > > interrupt. > > > > > > > > > > This patch adds a new compatible string for Renesas RZ/Five SoC and adds > > > > > support to change interrupt flow based on the interrupt type. It also > > > > > implements irq_ack and irq_set_type callbacks. > > > > > > > > > > Signed-off-by: Lad Prabhakar > > > > > > > > Thanks for your patch! > > > > > > > > > --- a/drivers/irqchip/irq-sifive-plic.c > > > > > +++ b/drivers/irqchip/irq-sifive-plic.c > > > > > > > @@ -163,10 +166,31 @@ static int plic_set_affinity(struct irq_data *d, > > > > > } > > > > > #endif > > > > > > > > > > +static void plic_irq_ack(struct irq_data *d) > > > > > +{ > > > > > + struct plic_handler *handler = this_cpu_ptr(&plic_handlers); > > > > > + > > > > > > > > No check for RZ/Five or irq type? > > > That is because we set the handle_fasteoi_ack_irq() only in case of > > > RZ/Five and it is already checked in set_type() callback. > > > > > > > .irq_ack() seems to be called for level interrupts, too > > > > (from handle_level_irq() through mask_ack_irq()). > > > > > > > Right but we are using handle_fasteoi_irq() for level interrupt which > > > doesn't call mask_ack_irq(). And I have confirmed by adding a print in > > > ack callback and just enabling the serial (which has level > > > interrupts). > > > > But handle_fasteoi_irq() is configured only on RZ/Five below? > > Which handler is used on non-RZ/Five? > > > For non RZ/Five, handle_fasteoi_irq() [0] is used for both edge/level > interrupts. > > [0] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/irqchip/irq-sifive-plic.c?h=next-20220525#n195 Thanks, that was the missing piece! Due to the new "select IRQ_FASTEOI_HIERARCHY_HANDLERS", I thought your new call to handle_fasteoi_irq() had to be the first one in this file... But that config symbol protects handle_fasteoi_ack_irq(), not handle_fasteoi_irq(). Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds