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From: Andreas Noever <andreas.noever@gmail.com>
Date: Mon, 5 Jun 2017 19:01:10 +0200
Message-ID: <CAMxnaaXp2ch4foOvRc6F4SLzyN1uSxHAFBknQVzJXMjKpPW+Vw@mail.gmail.com>
Subject: Re: [PATCH v3 00/27] Thunderbolt security levels and NVM firmware upgrade
To: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Michael Jamet <michael.jamet@intel.com>,
        Yehezkel Bernat <yehezkel.bernat@intel.com>,
        Lukas Wunner <lukas@wunner.de>, Amir Levy <amir.jer.levy@intel.com>,
        Andy Lutomirski <luto@kernel.org>, Mario.Limonciello@dell.com,
        Jared.Dominguez@dell.com,
        Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
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On Mon, Jun 5, 2017 at 9:18 AM, Mika Westerberg
<mika.westerberg@linux.intel.com> wrote:
> On Sat, Jun 03, 2017 at 06:17:04PM +0900, Greg Kroah-Hartman wrote:
>> On Fri, Jun 02, 2017 at 05:04:57PM +0300, Mika Westerberg wrote:
>> > Hi,
>> >
>> > This is a third version of the patch series adding support for Thunderbolt
>> > security levels and NVM firmware upgrade. PCs running Intel Falcon Ridge or
>> > newer need these in order to connect devices if the security level is set
>> > to "user(SL1) or secure(SL2)" from BIOS.
>>
>> All looks good to me, very nice work.
>
> Thanks!
>
>> I don't know what tree it should go in through, but if Andreas wants me
>> to take it, I will if I can get his signed-off-by.
>
> That would be perfect.
>
> Andreas, do you have any objections?
No, Thanks a lot.

Signed-off-by: Andreas Noever <andreas.noever@gmail.com>

Greg, can you take this through your tree?



Mika, I have a quick question regarding the pci side of things (your
"pci=hpbussize=10,hpmemsize=2M" workaround). Does that work for nested
hotplug or just on the first level? Back when I was having a look at
enabling chaining in the native driver I could not get pci to properly
assign bus numbers to nested bridges. It always ran out of bus number
after one level (irregardless of hpbussize). Has the pci behaviour
changed or does the ICM somehow preconfigure the bridges before
handing them of to linux?

Cheers
Andreas


> I will prepare another version where I've fixed the VSEC vs. VSE thing
> in the capability rework patch.