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* [PATCH v3] KVM: LAPIC: Keep stored TMCCT register value 0 after KVM_SET_LAPIC
@ 2021-06-09  7:16 Wanpeng Li
  2021-06-17  4:33 ` Wanpeng Li
  2021-06-17 18:26 ` Paolo Bonzini
  0 siblings, 2 replies; 3+ messages in thread
From: Wanpeng Li @ 2021-06-09  7:16 UTC (permalink / raw)
  To: linux-kernel, kvm
  Cc: Paolo Bonzini, Sean Christopherson, Vitaly Kuznetsov, Wanpeng Li,
	Jim Mattson, Joerg Roedel

From: Wanpeng Li <wanpengli@tencent.com>

KVM_GET_LAPIC stores the current value of TMCCT and KVM_SET_LAPIC's memcpy 
stores it in vcpu->arch.apic->regs, KVM_SET_LAPIC could store zero in 
vcpu->arch.apic->regs after it uses it, and then the stored value would 
always be zero. In addition, the TMCCT is always computed on-demand and 
never directly readable.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
---
 arch/x86/kvm/lapic.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 6d72d8f43310..9bd29b3ca790 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -2628,6 +2628,7 @@ int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s)
 	apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));
 	update_divide_count(apic);
 	__start_apic_timer(apic, APIC_TMCCT);
+	kvm_lapic_set_reg(apic, APIC_TMCCT, 0);
 	kvm_apic_update_apicv(vcpu);
 	apic->highest_isr_cache = -1;
 	if (vcpu->arch.apicv_active) {
-- 
2.25.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v3] KVM: LAPIC: Keep stored TMCCT register value 0 after KVM_SET_LAPIC
  2021-06-09  7:16 [PATCH v3] KVM: LAPIC: Keep stored TMCCT register value 0 after KVM_SET_LAPIC Wanpeng Li
@ 2021-06-17  4:33 ` Wanpeng Li
  2021-06-17 18:26 ` Paolo Bonzini
  1 sibling, 0 replies; 3+ messages in thread
From: Wanpeng Li @ 2021-06-17  4:33 UTC (permalink / raw)
  To: LKML, kvm
  Cc: Paolo Bonzini, Sean Christopherson, Vitaly Kuznetsov, Wanpeng Li,
	Jim Mattson, Joerg Roedel

kindly ping, :)
On Wed, 9 Jun 2021 at 15:17, Wanpeng Li <kernellwp@gmail.com> wrote:
>
> From: Wanpeng Li <wanpengli@tencent.com>
>
> KVM_GET_LAPIC stores the current value of TMCCT and KVM_SET_LAPIC's memcpy
> stores it in vcpu->arch.apic->regs, KVM_SET_LAPIC could store zero in
> vcpu->arch.apic->regs after it uses it, and then the stored value would
> always be zero. In addition, the TMCCT is always computed on-demand and
> never directly readable.
>
> Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
> ---
>  arch/x86/kvm/lapic.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 6d72d8f43310..9bd29b3ca790 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -2628,6 +2628,7 @@ int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s)
>         apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));
>         update_divide_count(apic);
>         __start_apic_timer(apic, APIC_TMCCT);
> +       kvm_lapic_set_reg(apic, APIC_TMCCT, 0);
>         kvm_apic_update_apicv(vcpu);
>         apic->highest_isr_cache = -1;
>         if (vcpu->arch.apicv_active) {
> --
> 2.25.1
>

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH v3] KVM: LAPIC: Keep stored TMCCT register value 0 after KVM_SET_LAPIC
  2021-06-09  7:16 [PATCH v3] KVM: LAPIC: Keep stored TMCCT register value 0 after KVM_SET_LAPIC Wanpeng Li
  2021-06-17  4:33 ` Wanpeng Li
@ 2021-06-17 18:26 ` Paolo Bonzini
  1 sibling, 0 replies; 3+ messages in thread
From: Paolo Bonzini @ 2021-06-17 18:26 UTC (permalink / raw)
  To: Wanpeng Li, linux-kernel, kvm
  Cc: Sean Christopherson, Vitaly Kuznetsov, Wanpeng Li, Jim Mattson,
	Joerg Roedel

On 09/06/21 09:16, Wanpeng Li wrote:
> From: Wanpeng Li <wanpengli@tencent.com>
> 
> KVM_GET_LAPIC stores the current value of TMCCT and KVM_SET_LAPIC's memcpy
> stores it in vcpu->arch.apic->regs, KVM_SET_LAPIC could store zero in
> vcpu->arch.apic->regs after it uses it, and then the stored value would
> always be zero. In addition, the TMCCT is always computed on-demand and
> never directly readable.
> 
> Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
> ---
>   arch/x86/kvm/lapic.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 6d72d8f43310..9bd29b3ca790 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -2628,6 +2628,7 @@ int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s)
>   	apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));
>   	update_divide_count(apic);
>   	__start_apic_timer(apic, APIC_TMCCT);
> +	kvm_lapic_set_reg(apic, APIC_TMCCT, 0);
>   	kvm_apic_update_apicv(vcpu);
>   	apic->highest_isr_cache = -1;
>   	if (vcpu->arch.apicv_active) {
> 

Queued, thanks.

Paolo


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-06-17 18:26 UTC | newest]

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2021-06-09  7:16 [PATCH v3] KVM: LAPIC: Keep stored TMCCT register value 0 after KVM_SET_LAPIC Wanpeng Li
2021-06-17  4:33 ` Wanpeng Li
2021-06-17 18:26 ` Paolo Bonzini

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