From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 580D7C2D0E4 for ; Mon, 23 Nov 2020 07:17:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DDD9D20727 for ; Mon, 23 Nov 2020 07:17:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=sifive.com header.i=@sifive.com header.b="cJi+sHIc" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728039AbgKWHQu (ORCPT ); Mon, 23 Nov 2020 02:16:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726163AbgKWHQu (ORCPT ); Mon, 23 Nov 2020 02:16:50 -0500 Received: from mail-ot1-x342.google.com (mail-ot1-x342.google.com [IPv6:2607:f8b0:4864:20::342]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 23D2DC0613CF for ; Sun, 22 Nov 2020 23:16:50 -0800 (PST) Received: by mail-ot1-x342.google.com with SMTP id z24so992603oto.6 for ; Sun, 22 Nov 2020 23:16:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=wLXgsyTqO2RarUvyH8ZTTAYF4WDtQk4zjdGgRXC7rCg=; b=cJi+sHIc9PIFYzVrxZIJR6TBDveCOPoJo7R9h9i35/0I1WcDW0tCvgyKeQNWpFHauV H1YjIY8kRymMFlnofU0cW6rqxYuTIw1VRpSCRiL36LNItAs2MfpGnwmTt+RMg5tY4XLg ciAXADVti0dmblXhg00sub5IbraSwBVnEfIyF7NizMX6kKjTbsv50O3SRm6+3FJx1qG6 WnZEa7whuIHVCP2Kzz5OJuO2BLi+dEKi2ZV1CQxsmjh3viQ+bS0KKeKpey/gRXqdND+q mTsaphypJz0oRNOr2CqFWneCcMqa5zptoQYzGXRQvx7YTrhaCoTW5KvrTngH8glCvWSb pWhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=wLXgsyTqO2RarUvyH8ZTTAYF4WDtQk4zjdGgRXC7rCg=; b=Zn+4jJd6rJuA/0GLFVknCNo9Am/tsORJrXZZi0YVsTlpy96U8vnOcAgJfQHS0IoBG2 kXL4S6b/CYhYWGr2/jp/6jM6Px8XPDzZ919f7vE8cS+E3HjN+LdEriFbp7v8MKGFhAeZ dkncaaxVBvV1foSorT548A6tsaQsz1pWGTEa5VZOrp98netq2AhS3urGjeC28/glQig3 qJlwHH/iv4nS2aeL/3ysQs0JvumvxTMVquqzlsEla3zhmOfEXKgQwcHICLqws7GK6/xu IuRouBtwuvkjE5g+yYf2wPj/70EW6bq1mEhnCAYHqZzeRarvC63VxXXFsj4wlZpVufu8 qkSQ== X-Gm-Message-State: AOAM533txcaV4FwTiupNSGl0VLHXAurG7gHlh4IHavaLr2uXiP1/Lwe/ uQW766tRSVZRfhwUpdI5qucXyq2SSVWuhh8Z89xphQ== X-Google-Smtp-Source: ABdhPJzVm9yG9nWXa/SZbEw2G6kXq7rqr9EqAzpThBAB7CTo/wwfjZlLxIvi+xA2Iol2Cfd/oLqW1289GKRfVU/RQNE= X-Received: by 2002:a9d:6f8f:: with SMTP id h15mr22425313otq.166.1606115809393; Sun, 22 Nov 2020 23:16:49 -0800 (PST) MIME-Version: 1.0 References: <20201111100608.108842-3-zong.li@sifive.com> In-Reply-To: From: Zong Li Date: Mon, 23 Nov 2020 15:16:39 +0800 Message-ID: Subject: Re: [PATCH v4 2/4] clk: sifive: Use common name for prci configuration To: Palmer Dabbelt Cc: Paul Walmsley , Stephen Boyd , Andreas Schwab , Pragnesh Patel , Albert Ou , Michael Turquette , Yash Shah , "linux-kernel@vger.kernel.org List" , linux-clk@vger.kernel.org, linux-riscv , Pragnesh Patel Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Nov 21, 2020 at 9:29 AM Palmer Dabbelt wrote: > > On Wed, 11 Nov 2020 02:06:06 PST (-0800), zong.li@sifive.com wrote: > > Use generic name CLK_SIFIVE_PRCI instead of CLK_SIFIVE_FU540_PRCI. This > > patch is prepared for fu740 support. > > > > Signed-off-by: Zong Li > > Reviewed-by: Palmer Dabbelt > > Acked-by: Palmer Dabbelt > > Reviewed-by: Pragnesh Patel > > --- > > arch/riscv/Kconfig.socs | 2 +- > > drivers/clk/sifive/Kconfig | 6 +++--- > > drivers/clk/sifive/Makefile | 2 +- > > 3 files changed, 5 insertions(+), 5 deletions(-) > > > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > > index 8a55f6156661..3284d5c291be 100644 > > --- a/arch/riscv/Kconfig.socs > > +++ b/arch/riscv/Kconfig.socs > > @@ -5,7 +5,7 @@ config SOC_SIFIVE > > select SERIAL_SIFIVE if TTY > > select SERIAL_SIFIVE_CONSOLE if TTY > > select CLK_SIFIVE > > - select CLK_SIFIVE_FU540_PRCI > > + select CLK_SIFIVE_PRCI > > select SIFIVE_PLIC > > help > > This enables support for SiFive SoC platform hardware. > > diff --git a/drivers/clk/sifive/Kconfig b/drivers/clk/sifive/Kconfig > > index f3b4eb9cb0f5..ab48cf7e0105 100644 > > --- a/drivers/clk/sifive/Kconfig > > +++ b/drivers/clk/sifive/Kconfig > > @@ -8,12 +8,12 @@ menuconfig CLK_SIFIVE > > > > if CLK_SIFIVE > > > > -config CLK_SIFIVE_FU540_PRCI > > - bool "PRCI driver for SiFive FU540 SoCs" > > +config CLK_SIFIVE_PRCI > > + bool "PRCI driver for SiFive SoCs" > > select CLK_ANALOGBITS_WRPLL_CLN28HPC > > help > > Supports the Power Reset Clock interface (PRCI) IP block found in > > - FU540 SoCs. If this kernel is meant to run on a SiFive FU540 SoC, > > + FU540 SoCs. If this kernel is meant to run on a SiFive FU540 SoC, > > This just removes the double-space. Presumably in should also remove the > "FU540", as this clock driver will now function for multiple SiFive SOCs? > I'd like to list the support SoCs here, so in the third patch, I list the FU740 in the description as well. I would remove the SoC names if it is better by using a generic term. What do you think about that? > > enable this driver. > > > > endif > > diff --git a/drivers/clk/sifive/Makefile b/drivers/clk/sifive/Makefile > > index 627effe2ece1..fe3e2cb4c4d8 100644 > > --- a/drivers/clk/sifive/Makefile > > +++ b/drivers/clk/sifive/Makefile > > @@ -1,4 +1,4 @@ > > # SPDX-License-Identifier: GPL-2.0-only > > obj-y += sifive-prci.o > > > > -obj-$(CONFIG_CLK_SIFIVE_FU540_PRCI) += fu540-prci.o > > +obj-$(CONFIG_CLK_SIFIVE_PRCI) += fu540-prci.o > > Probably best to rename the source file as well. I added fu740-prci.c in the third patch, these two files fu740-prci.c and fu540-prci.c hold the soc-dependent code, and sifive-prci.c is the core of this driver.