From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Authentication-Results: smtp.codeaurora.org; dkim=pass (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="MNjqYkfP" DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 77C9560555 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754063AbeFFQML (ORCPT + 25 others); Wed, 6 Jun 2018 12:12:11 -0400 Received: from mail.kernel.org ([198.145.29.99]:60116 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932795AbeFFQMG (ORCPT ); Wed, 6 Jun 2018 12:12:06 -0400 X-Google-Smtp-Source: ADUXVKJQzjcQJQGIJpfR7YADs+CM5nImyBNBi1yYkpedn60d4pfvaG3zy3KNPxeXY6vhDmfSxZ8R8n1ey9Qa7WDikog= MIME-Version: 1.0 In-Reply-To: <1525229431-3087-15-git-send-email-hao.wu@intel.com> References: <1525229431-3087-1-git-send-email-hao.wu@intel.com> <1525229431-3087-15-git-send-email-hao.wu@intel.com> From: Alan Tull Date: Wed, 6 Jun 2018 11:08:02 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v5 14/28] fpga: dfl: add FPGA Management Engine driver basic framework To: Wu Hao Cc: Moritz Fischer , linux-fpga@vger.kernel.org, linux-kernel , linux-api@vger.kernel.org, "Kang, Luwei" , "Zhang, Yi Z" , Tim Whisonant , Enno Luebbers , Shiva Rao , Christopher Rauer , Xiao Guangrong Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 1, 2018 at 9:50 PM, Wu Hao wrote: Hi Hao, > From: Kang Luwei > > The FPGA Management Engine (FME) provides power, thermal management, > performance counters, partial reconfiguration and other functions. For each > function, it is packaged into a private feature linked to the FME feature > device in the 'Device Feature List'. It's a platform device created by > DFL framework. > > This patch adds the basic framework of FME platform driver. It defines > sub feature drivers to handle the different sub features, including init, > uinit and ioctl. It also registers the file operations for the device file. > > Signed-off-by: Tim Whisonant > Signed-off-by: Enno Luebbers > Signed-off-by: Shiva Rao > Signed-off-by: Christopher Rauer > Signed-off-by: Kang Luwei > Signed-off-by: Xiao Guangrong > Signed-off-by: Wu Hao Acked-by: Alan Tull > --- > v3: rename driver from intel-fpga-fme to dfl-fme > rename Kconfig from INTEL_FPGA_FME to FPGA_DFL_FME > v4: fix SPDX license issue, use dfl-fme as module name > v5: rebase, due to DFL framework naming changes on functions and data structures. > fix uinit order in remove function. > remove else block in fme_ioctl function per suggestion from Alan. > --- > drivers/fpga/Kconfig | 10 +++ > drivers/fpga/Makefile | 3 + > drivers/fpga/dfl-fme-main.c | 158 ++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 171 insertions(+) > create mode 100644 drivers/fpga/dfl-fme-main.c > > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > index 87f3d44..103d5e2 100644 > --- a/drivers/fpga/Kconfig > +++ b/drivers/fpga/Kconfig > @@ -140,6 +140,16 @@ config FPGA_DFL > Gate Array (FPGA) solutions which implement Device Feature List. > It provides enumeration APIs, and feature device infrastructure. > > +config FPGA_DFL_FME > + tristate "FPGA DFL FME Driver" > + depends on FPGA_DFL > + help > + The FPGA Management Engine (FME) is a feature device implemented > + under Device Feature List (DFL) framework. Select this option to > + enable the platform device driver for FME which implements all > + FPGA platform level management features. There shall be 1 FME > + per DFL based FPGA device. > + > config FPGA_DFL_PCI > tristate "FPGA Device Feature List (DFL) PCIe Device Driver" > depends on PCI && FPGA_DFL > diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile > index 4375630..fbd1c85 100644 > --- a/drivers/fpga/Makefile > +++ b/drivers/fpga/Makefile > @@ -30,6 +30,9 @@ obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o > > # FPGA Device Feature List Support > obj-$(CONFIG_FPGA_DFL) += dfl.o > +obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o > + > +dfl-fme-objs := dfl-fme-main.o > > # Drivers for FPGAs which implement DFL > obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o > diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c > new file mode 100644 > index 0000000..000651f > --- /dev/null > +++ b/drivers/fpga/dfl-fme-main.c > @@ -0,0 +1,158 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Driver for FPGA Management Engine (FME) > + * > + * Copyright (C) 2017 Intel Corporation, Inc. > + * > + * Authors: > + * Kang Luwei > + * Xiao Guangrong > + * Joseph Grecco > + * Enno Luebbers > + * Tim Whisonant > + * Ananda Ravuri > + * Henry Mitchel > + */ > + > +#include > +#include > + > +#include "dfl.h" > + > +static int > +fme_hdr_init(struct platform_device *pdev, struct dfl_feature *feature) Minor nit, where possible please stick with consistently having the function name in the same line as the return type such as: static int fme_hdr_init(struct platform_device *pdev, so on... > +{ > + dev_dbg(&pdev->dev, "FME HDR Init.\n"); > + > + return 0; > +} > + > +static void > +fme_hdr_uinit(struct platform_device *pdev, struct dfl_feature *feature) > +{ > + dev_dbg(&pdev->dev, "FME HDR UInit.\n"); > +} > + > +static const struct dfl_feature_ops fme_hdr_ops = { > + .init = fme_hdr_init, > + .uinit = fme_hdr_uinit, > +}; > + > +static struct dfl_feature_driver fme_feature_drvs[] = { > + { > + .id = FME_FEATURE_ID_HEADER, > + .ops = &fme_hdr_ops, > + }, > + { > + .ops = NULL, > + }, > +}; > + > +static int fme_open(struct inode *inode, struct file *filp) > +{ > + struct platform_device *fdev = dfl_fpga_inode_to_feature_dev(inode); > + struct dfl_feature_platform_data *pdata = dev_get_platdata(&fdev->dev); > + int ret; > + > + if (WARN_ON(!pdata)) > + return -ENODEV; > + > + ret = dfl_feature_dev_use_begin(pdata); > + if (ret) > + return ret; > + > + dev_dbg(&fdev->dev, "Device File Open\n"); > + filp->private_data = pdata; > + > + return 0; > +} > + > +static int fme_release(struct inode *inode, struct file *filp) > +{ > + struct dfl_feature_platform_data *pdata = filp->private_data; > + struct platform_device *pdev = pdata->dev; > + > + dev_dbg(&pdev->dev, "Device File Release\n"); > + dfl_feature_dev_use_end(pdata); > + > + return 0; > +} > + > +static long fme_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) > +{ > + struct dfl_feature_platform_data *pdata = filp->private_data; > + struct platform_device *pdev = pdata->dev; > + struct dfl_feature *f; > + long ret; > + > + dev_dbg(&pdev->dev, "%s cmd 0x%x\n", __func__, cmd); > + > + switch (cmd) { > + default: > + /* > + * Let sub-feature's ioctl function to handle the cmd > + * Sub-feature's ioctl returns -ENODEV when cmd is not > + * handled in this sub feature, and returns 0 and other > + * error code if cmd is handled. > + */ > + dfl_fpga_dev_for_each_feature(pdata, f) { > + if (f->ops && f->ops->ioctl) { > + ret = f->ops->ioctl(pdev, f, cmd, arg); > + if (ret != -ENODEV) > + return ret; > + } > + } > + } > + > + return -EINVAL; > +} > + > +static const struct file_operations fme_fops = { > + .owner = THIS_MODULE, > + .open = fme_open, > + .release = fme_release, > + .unlocked_ioctl = fme_ioctl, > +}; > + > +static int fme_probe(struct platform_device *pdev) > +{ > + int ret; > + > + ret = dfl_fpga_dev_feature_init(pdev, fme_feature_drvs); > + if (ret) > + goto exit; > + > + ret = dfl_fpga_register_dev_ops(pdev, &fme_fops, THIS_MODULE); > + if (ret) > + goto feature_uinit; > + > + return 0; > + > +feature_uinit: > + dfl_fpga_dev_feature_uinit(pdev); > +exit: > + return ret; > +} > + > +static int fme_remove(struct platform_device *pdev) > +{ > + dfl_fpga_unregister_dev_ops(pdev); > + dfl_fpga_dev_feature_uinit(pdev); > + > + return 0; > +} > + > +static struct platform_driver fme_driver = { > + .driver = { > + .name = DFL_FPGA_FEATURE_DEV_FME, > + }, > + .probe = fme_probe, > + .remove = fme_remove, > +}; > + > +module_platform_driver(fme_driver); > + > +MODULE_DESCRIPTION("FPGA Management Engine driver"); > +MODULE_AUTHOR("Intel Corporation"); > +MODULE_LICENSE("GPL v2"); > +MODULE_ALIAS("platform:dfl-fme"); > -- > 1.8.3.1 >