From: Alan Tull <atull@kernel.org>
To: Wu Hao <hao.wu@intel.com>
Cc: Moritz Fischer <mdf@kernel.org>,
linux-fpga@vger.kernel.org,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-api@vger.kernel.org, "Kang, Luwei" <luwei.kang@intel.com>,
"Zhang, Yi Z" <yi.z.zhang@intel.com>,
Tim Whisonant <tim.whisonant@intel.com>,
Enno Luebbers <enno.luebbers@intel.com>,
Shiva Rao <shiva.rao@intel.com>,
Christopher Rauer <christopher.rauer@intel.com>,
Xiao Guangrong <guangrong.xiao@linux.intel.com>
Subject: Re: [PATCH v2 12/22] fpga: intel: fme: add header sub feature support
Date: Mon, 17 Jul 2017 13:53:30 -0500 [thread overview]
Message-ID: <CANk1AXRD8eUSmcdJ9ZXpGDE=HVvxgFJyCMKSfGpJeD6a4TgCmg@mail.gmail.com> (raw)
In-Reply-To: <1498441938-14046-13-git-send-email-hao.wu@intel.com>
On Sun, Jun 25, 2017 at 8:52 PM, Wu Hao <hao.wu@intel.com> wrote:
Hi Hao,
I'm making my way through this (very large) patchset. Some minor
comments below.
> From: Kang Luwei <luwei.kang@intel.com>
>
> The header register set is always present for FPGA Management Engine (FME),
> this patch implements init and uinit function for header sub feature and
> introduce several read-only sysfs interfaces for the capability and status.
>
> Sysfs interfaces:
> * /sys/class/fpga/<fpga.x>/<intel-fpga-fme.x>/ports_num
> Read-only. Number of ports implemented
>
> * /sys/class/fpga/<fpga.x>/<intel-fpga-fme.x>/bitstream_id
> Read-only. Blue Bitstream identifier number
Blue and Green bitstreams are an Intel implementation terminology. I
see that you've defined them in drivers/fpga, but it will be helpful
to add in "static region" and "partial reconfiguration region" added
in any API documentation files that use the green/blue terminology to
keep it accessible.
>
> * /sys/class/fpga/<fpga.x>/<intel-fpga-fme.x>/bitstream_metadata
> Read-only. Blue Bitstream meta data
>
> Signed-off-by: Tim Whisonant <tim.whisonant@intel.com>
> Signed-off-by: Enno Luebbers <enno.luebbers@intel.com>
> Signed-off-by: Shiva Rao <shiva.rao@intel.com>
> Signed-off-by: Christopher Rauer <christopher.rauer@intel.com>
> Signed-off-by: Kang Luwei <luwei.kang@intel.com>
> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
> Signed-off-by: Wu Hao <hao.wu@intel.com>
> ---
> v2: add sysfs documentation
> ---
> .../ABI/testing/sysfs-platform-intel-fpga-fme | 19 ++++++++
> drivers/fpga/intel-feature-dev.h | 3 ++
> drivers/fpga/intel-fme-main.c | 55 ++++++++++++++++++++++
> 3 files changed, 77 insertions(+)
> create mode 100644 Documentation/ABI/testing/sysfs-platform-intel-fpga-fme
>
> diff --git a/Documentation/ABI/testing/sysfs-platform-intel-fpga-fme b/Documentation/ABI/testing/sysfs-platform-intel-fpga-fme
> new file mode 100644
> index 0000000..783cfa9
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-platform-intel-fpga-fme
> @@ -0,0 +1,19 @@
> +What: /sys/bus/platform/devices/intel-fpga-fme.0/ports_num
> +Date: June 2017
> +KernelVersion: 4.12
> +Contact: Wu Hao <hao.wu@intel.com>
> +Description: Read-only. One Intel FPGA device may have more than 1
> + port/Accelerator Function Unit (AFU). It returns the
> + number of ports on the FPGA device when read it.
> +
> +What: /sys/bus/platform/devices/intel-fpga-fme.0/bitstream_id
> +Date: June 2017
> +KernelVersion: 4.12
> +Contact: Wu Hao <hao.wu@intel.com>
> +Description: Read-only. It returns Blue Bitstream identifier number.
Here
> +
> +What: /sys/bus/platform/devices/intel-fpga-fme.0/bitstream_meta
> +Date: June 2017
> +KernelVersion: 4.12
> +Contact: Wu Hao <hao.wu@intel.com>
> +Description: Read-only. It returns Blue Bitstream meta data.
And here
> diff --git a/drivers/fpga/intel-feature-dev.h b/drivers/fpga/intel-feature-dev.h
> index 635b857..3f97b75 100644
> --- a/drivers/fpga/intel-feature-dev.h
> +++ b/drivers/fpga/intel-feature-dev.h
> @@ -138,6 +138,9 @@ struct feature_fme_header {
> u64 rsvd[2];
> struct feature_fme_capability capability;
> struct feature_fme_port port[MAX_FPGA_PORT_NUM];
> + u64 rsvd1;
> + u64 bitstream_id;
> + u64 bitstream_md;
> };
>
> /* FME Thermal Sub Feature Register Set */
> diff --git a/drivers/fpga/intel-fme-main.c b/drivers/fpga/intel-fme-main.c
> index c16cf81..dfbb17c 100644
> --- a/drivers/fpga/intel-fme-main.c
> +++ b/drivers/fpga/intel-fme-main.c
> @@ -21,15 +21,70 @@
>
> #include "intel-feature-dev.h"
>
> +static ssize_t ports_num_show(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + struct feature_fme_header *fme_hdr
> + = get_feature_ioaddr_by_index(dev, FME_FEATURE_ID_HEADER);
> + struct feature_fme_capability fme_capability;
> +
> + fme_capability.csr = readq(&fme_hdr->capability);
> +
> + return scnprintf(buf, PAGE_SIZE, "%d\n", fme_capability.num_ports);
> +}
> +static DEVICE_ATTR_RO(ports_num);
> +
> +static ssize_t bitstream_id_show(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + struct feature_fme_header *fme_hdr
> + = get_feature_ioaddr_by_index(dev, FME_FEATURE_ID_HEADER);
> + u64 bitstream_id = readq(&fme_hdr->bitstream_id);
> +
> + return scnprintf(buf, PAGE_SIZE, "0x%llx\n",
> + (unsigned long long)bitstream_id);
> +}
> +static DEVICE_ATTR_RO(bitstream_id);
> +
> +static ssize_t bitstream_metadata_show(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + struct feature_fme_header *fme_hdr
> + = get_feature_ioaddr_by_index(dev, FME_FEATURE_ID_HEADER);
> + u64 bitstream_md = readq(&fme_hdr->bitstream_md);
> +
> + return scnprintf(buf, PAGE_SIZE, "0x%llx\n",
> + (unsigned long long)bitstream_md);
> +}
> +static DEVICE_ATTR_RO(bitstream_metadata);
> +
> +static const struct attribute *fme_hdr_attrs[] = {
> + &dev_attr_ports_num.attr,
> + &dev_attr_bitstream_id.attr,
> + &dev_attr_bitstream_metadata.attr,
> + NULL,
> +};
> +
> static int fme_hdr_init(struct platform_device *pdev, struct feature *feature)
> {
> + struct feature_fme_header *fme_hdr = feature->ioaddr;
> + int ret;
> +
> dev_dbg(&pdev->dev, "FME HDR Init.\n");
> + dev_dbg(&pdev->dev, "FME cap %llx.\n",
> + (unsigned long long)fme_hdr->capability.csr);
> +
> + ret = sysfs_create_files(&pdev->dev.kobj, fme_hdr_attrs);
> + if (ret)
> + return ret;
> +
> return 0;
> }
>
> static void fme_hdr_uinit(struct platform_device *pdev, struct feature *feature)
> {
> dev_dbg(&pdev->dev, "FME HDR UInit.\n");
> + sysfs_remove_files(&pdev->dev.kobj, fme_hdr_attrs);
> }
>
> struct feature_ops fme_hdr_ops = {
> --
> 1.8.3.1
>
next prev parent reply other threads:[~2017-07-17 18:54 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-26 1:51 [PATCH v2 00/22] Intel FPGA Device Drivers Wu Hao
2017-06-26 1:51 ` [PATCH v2 01/22] docs: fpga: add a document for Intel FPGA driver overview Wu Hao
2017-07-12 14:51 ` Alan Tull
2017-07-13 4:25 ` Wu Hao
2017-07-14 23:59 ` Luebbers, Enno
2017-07-17 20:14 ` Alan Tull
2017-07-18 5:22 ` Greg KH
2017-07-18 14:32 ` Alan Tull
2017-06-26 1:51 ` [PATCH v2 02/22] fpga: add FPGA device framework Wu Hao
2017-07-27 16:35 ` Alan Tull
2017-07-27 19:10 ` Rob Herring
2017-07-31 21:40 ` Alan Tull
2017-08-01 8:43 ` Wu Hao
2017-08-01 21:04 ` Alan Tull
2017-08-02 14:07 ` Wu Hao
2017-08-02 21:01 ` Alan Tull
2017-08-07 15:13 ` Alan Tull
2017-07-27 16:44 ` Alan Tull
2017-07-28 7:55 ` Wu Hao
2017-06-26 1:51 ` [PATCH v2 03/22] fpga: bridge: remove OF dependency for fpga-bridge Wu Hao
2017-08-02 21:21 ` Alan Tull
2017-09-25 16:34 ` Moritz Fischer
2017-09-21 19:11 ` Moritz Fischer
2017-09-21 19:50 ` Alan Tull
2017-09-22 2:15 ` Wu Hao
2017-09-23 1:53 ` Alan Tull
2017-06-26 1:52 ` [PATCH v2 04/22] fpga: mgr: add region_id to fpga_image_info Wu Hao
2017-07-26 18:33 ` Alan Tull
2017-07-27 5:14 ` Wu Hao
2017-06-26 1:52 ` [PATCH v2 05/22] fpga: mgr: add status for fpga-mgr Wu Hao
2017-07-12 15:22 ` Alan Tull
2017-07-13 3:11 ` Wu Hao
2017-06-26 1:52 ` [PATCH v2 06/22] fpga: intel: add FPGA PCIe device driver Wu Hao
2017-08-07 20:43 ` Alan Tull
2017-08-14 12:33 ` Wu, Hao
2017-06-26 1:52 ` [PATCH v2 07/22] fpga: intel: pcie: parse feature list and create platform device for features Wu Hao
2017-06-26 18:42 ` Moritz Fischer
2017-06-27 3:17 ` Wu Hao
2017-06-27 15:34 ` Alan Tull
2017-07-13 17:52 ` Alan Tull
2017-07-14 9:22 ` Wu Hao
2017-07-17 19:15 ` Alan Tull
2017-07-18 2:29 ` Wu, Hao
2017-09-20 21:24 ` Alan Tull
2017-09-21 19:58 ` Alan Tull
2017-09-22 7:33 ` Wu Hao
2017-09-22 7:28 ` Wu Hao
2017-09-27 20:27 ` Alan Tull
2017-09-28 9:32 ` Wu Hao
2017-06-26 1:52 ` [PATCH v2 08/22] fpga: intel: pcie: add chardev support for feature devices Wu Hao
2017-06-26 1:52 ` [PATCH v2 09/22] fpga: intel: pcie: adds fpga_for_each_port callback for fme device Wu Hao
2017-08-17 21:31 ` Alan Tull
2017-08-18 7:03 ` Wu Hao
2017-06-26 1:52 ` [PATCH v2 10/22] fpga: intel: add feature device infrastructure Wu Hao
2017-06-26 1:52 ` [PATCH v2 11/22] fpga: intel: add FPGA Management Engine driver basic framework Wu Hao
2017-06-26 1:52 ` [PATCH v2 12/22] fpga: intel: fme: add header sub feature support Wu Hao
2017-07-17 18:53 ` Alan Tull [this message]
2017-07-18 1:17 ` Wu, Hao
2017-07-18 14:33 ` Alan Tull
2017-06-26 1:52 ` [PATCH v2 13/22] fpga: intel: fme: add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-08-17 19:11 ` Alan Tull
2017-06-26 1:52 ` [PATCH v2 14/22] fpga: intel: fme: add partial reconfiguration sub feature support Wu Hao
2017-06-26 1:52 ` [PATCH v2 15/22] fpga: intel: add fpga manager platform driver for FME Wu Hao
2017-09-25 21:24 ` Moritz Fischer
2017-09-27 1:18 ` Wu Hao
2017-09-27 18:54 ` Alan Tull
2017-09-28 8:25 ` Wu Hao
2017-06-26 1:52 ` [PATCH v2 16/22] fpga: intel: add fpga bridge " Wu Hao
2017-08-17 19:34 ` Alan Tull
2017-08-17 19:55 ` Moritz Fischer
2017-08-18 3:06 ` Wu Hao
2017-06-26 1:52 ` [PATCH v2 17/22] fpga: intel: add fpga region " Wu Hao
2017-07-12 16:09 ` Alan Tull
2017-07-13 2:31 ` Wu Hao
2017-06-26 1:52 ` [PATCH v2 18/22] fpga: intel: add FPGA Accelerated Function Unit driver basic framework Wu Hao
2017-08-17 19:00 ` Alan Tull
2017-08-18 6:40 ` Wu Hao
2017-08-17 19:09 ` Moritz Fischer
2017-08-18 6:42 ` Wu Hao
2017-06-26 1:52 ` [PATCH v2 19/22] fpga: intel: afu: add header sub feature support Wu Hao
2017-08-14 21:37 ` Alan Tull
2017-08-16 5:11 ` Wu, Hao
2017-08-17 21:41 ` Alan Tull
2017-06-26 1:52 ` [PATCH v2 20/22] fpga: intel: afu add FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support Wu Hao
2017-08-17 19:07 ` Alan Tull
2017-08-17 19:12 ` Moritz Fischer
2017-08-18 3:20 ` Wu Hao
2017-06-26 1:52 ` [PATCH v2 21/22] fpga: intel: afu: add user afu sub feature support Wu Hao
2017-06-26 1:52 ` [PATCH v2 22/22] fpga: intel: afu: add FPGA_PORT_DMA_MAP/UNMAP ioctls support Wu Hao
2017-07-31 21:41 ` Alan Tull
2017-08-01 7:21 ` Wu Hao
2017-08-01 18:15 ` Moritz Fischer
2017-08-02 7:30 ` Wu Hao
2017-07-28 13:28 ` [PATCH v2 00/22] Intel FPGA Device Drivers Alan Tull
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