From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D748C4332F for ; Wed, 15 Sep 2021 03:29:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6D8EF61214 for ; Wed, 15 Sep 2021 03:29:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236099AbhIODad (ORCPT ); Tue, 14 Sep 2021 23:30:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230015AbhIODac (ORCPT ); Tue, 14 Sep 2021 23:30:32 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C87EBC061574; Tue, 14 Sep 2021 20:29:13 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id p29so3012227lfa.11; Tue, 14 Sep 2021 20:29:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=xjPe0L3/nKX+cxkcdx6J3H8tI9DskxplI0rZEOeSfEI=; b=cItu3tzlIDDd7Y1hg8IJ917JedA08BLloCM/HgDzINxwBv20gae3/2mnvIen/26P63 cGIFNnmZp7wbtI8qMriLggtFBUk2+Zvk77SM29S6z/AGp56JT2vMTaUDQ9uBaoUFHkfx F4gUfx3urNci+GoBWnAh6/iVx13KAt7XYF26lRCkn3yZIWrQeHps+Sw0gHckX9Bi1fhs Z7rFQXcr8CF6cMt815lk9ti8IZ5zQlWie6bvy8a2lcVrpQWvqkozqg6INqoNU5PgKYpY dvewlFLqvkOBlKDccqTsQ/0+lES85p0o0G6gQZTUwV5NnxkOhGEBfNCbgiaAVk5Gic0f UDFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=xjPe0L3/nKX+cxkcdx6J3H8tI9DskxplI0rZEOeSfEI=; b=uCuxaBhY5FCNXg1QRpl3WDoHNFdGMLNajXfvvUV63VJUvUbZZUoHwMRrYXxfGA1JHy f/ICQTpKli8QotWi8u4Mjgb8fUSbhhbhh4MSqsWfTfywGKLq7GGOA5Az07p3atFgw5Bt ImpAWjm/KRV6MbbEb/EafjRx10OhycdHJYJIOCog4hzlLsPHSF0HgyhWjrqX68hctAyO F2wioUVcTeCBmVL4ID0ZV1+McWbawIjy7XKnUUqNMTvktd/L00K4HPS7SxGIppUXc6Bk NTk626M5OyVEhO+56ujmxvWHoOner86dRymjvWdaeMIOw//2T56vr4IoTrpn2FtsbqPz 2fQg== X-Gm-Message-State: AOAM530qsqcuJFEzjR/4TYS4GYXN3ptWx1EysAALG5WmEXDu9qRkG1jy Tz1r06otRhJjQDkeA+wVRBTss9OSawanyg7ufcS5pwpq X-Google-Smtp-Source: ABdhPJyXnY5xw1lixcYCeqp6mFmyw+KSA3GBfEYzlY7tBbUhvQE+FUVohBSaD8cqbi6xH8IjWGRq/6rRlVXN1Gc1sWs= X-Received: by 2002:a19:c512:: with SMTP id w18mr14982680lfe.182.1631676552185; Tue, 14 Sep 2021 20:29:12 -0700 (PDT) MIME-Version: 1.0 References: <20200624195811.435857-1-maz@kernel.org> <20200624195811.435857-8-maz@kernel.org> <875yv8d91b.wl-maz@kernel.org> <874kaqdi2z.wl-maz@kernel.org> In-Reply-To: From: Magnus Damm Date: Wed, 15 Sep 2021 12:28:59 +0900 Message-ID: Subject: Re: [PATCH v2 07/17] irqchip/gic: Atomically update affinity To: Geert Uytterhoeven Cc: Marc Zyngier , Russell King , Linux ARM , Linux Kernel Mailing List , Will Deacon , Catalin Marinas , Thomas Gleixner , Jason Cooper , Sumit Garg , Valentin Schneider , Florian Fainelli , Gregory Clement , Andrew Lunn , Android Kernel Team , stable , Magnus Damm , =?UTF-8?Q?Niklas_S=C3=B6derlund?= , Linux-Renesas Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Geert, everyone, On Mon, Sep 13, 2021 at 5:05 PM Geert Uytterhoeven wrote: > > Hi Magnus, > > On Sun, Sep 12, 2021 at 7:40 AM Magnus Damm wrote: > > On Sun, Sep 12, 2021 at 4:32 AM Marc Zyngier wrote: > > > On Sat, 11 Sep 2021 03:49:20 +0100, > > > Magnus Damm wrote: > > > > On Fri, Sep 10, 2021 at 10:19 PM Geert Uytterhoeven > > > > wrote: > > > > > On Fri, Sep 10, 2021 at 12:23 PM Marc Zyngier wrote: > > > > > > On Thu, 09 Sep 2021 16:22:01 +0100, > > > > > > Geert Uytterhoeven wrote: > > > > > GIC: enabling workaround for broken byte access > > > > > > > > Indeed, byte access is unsupported according to the EMEV2 documentation. > > > > > > > > The EMEV2 documentation R19UH0036EJ0600 Chapter 7 Interrupt Control on > > > > page 97 says: > > > > "Interrupt registers can be accessed via the APB bus, in 32-bit units" > > > > "For details about register functions, see ARM Generic Interrupt > > > > Controller Architecture Specification Architecture version 1.0" > > > > The file "R19UH0036EJ0600_1Chip.pdf" is the 6th edition version > > > > published in 2010 and is not marked as confidential. > > > > > > This is as bad as it gets. Do you know if any other Renesas platform > > > is affected by the same issue? > > > > Next time we have a beer together I would be happy to show you some > > legacy interrupt controller code. =) > > > > EMEV2 and the Emma Mobile product line came from the NEC Electronics > > side that got merged into Renesas Electronics in 2010. Historically > > NEC Electronics mainly used MIPS I've been told, and the Emma Mobile > > SoCs were one of the earlier Cortex-A9 adopters. That might have > > something to do with the rather loose interpretation of the spec. > > Indeed. I used to work on products using EMMA1 and EMMA2, and they > were MIPS-based (vr4120A for EMMA2, IIRC). Later variants (EMMA2H > and EMMA3?) did include a small ARM core for standby control. Thanks for sharing some more background! > > Renesas SoCs from a similar era: > > AP4 (sh7372) AP4EVB (Cortex-A8 + INTCA/INTCS) > > This is no longer supported upstream (and not affected, as no GIC). Right. I might mix it up with the AP4.5 chip that I used for SMP prototyping back then. It had 4 x CA9 and obviously a GIC. > > R-Mobile A1 (r8a7740) Armadillo-800-EVA (Cortex-A9 + INTCA/INTCS) > > R-Mobile A1 has GIC (PL390), too, and is not affected. > > > R-Car M1A (r8a7778) Bock-W (Cortex-A9 + GIC) > > R-Car H1 (r8a7779) Marzen (4 x Cortex-A9 + GIC) > > Emma Mobile EMEV2 KZM9D (2 x Cortex-A9 + GIC) > > SH-Mobile AG5 (sh73a0) KZM9G (2 x Cortex-A9 + GIC) > > All of these (except for EMEV2) are fine, too. Thanks for checking! Cheers, / magnus