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References: <20221128054820.1771-1-clin@suse.com> <20221128054820.1771-3-clin@suse.com>
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From:   Fabio Estevam <festevam@gmail.com>
Date:   Wed, 7 Dec 2022 20:04:18 -0300
Message-ID: <CAOMZO5D0wJcfbFsvUN3K17S5F4zT2Yf8yQB+wMKQPzuMBitrpA@mail.gmail.com>
Subject: Re: [PATCH v2 2/2] pinctrl: add NXP S32 SoC family support
To:     Chester Lin <clin@suse.com>
Cc:     Dong Aisheng <aisheng.dong@nxp.com>,
        Shawn Guo <shawnguo@kernel.org>, Jacky Bai <ping.bai@nxp.com>,
        Pengutronix Kernel Team <kernel@pengutronix.de>, s32@nxp.com,
        linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        Linus Walleij <linus.walleij@linaro.org>,
        Larisa Grigore <larisa.grigore@nxp.com>,
        Ghennadi Procopciuc <Ghennadi.Procopciuc@nxp.com>,
        Andrei Stefanescu <andrei.stefanescu@nxp.com>,
        Radu Pirea <radu-nicolae.pirea@nxp.com>,
        =?UTF-8?Q?Andreas_F=C3=A4rber?= <afaerber@suse.de>,
        Matthias Brugger <mbrugger@suse.com>,
        Matthew Nunez <matthew.nunez@nxp.com>,
        Phu Luu An <phu.luuan@nxp.com>,
        Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
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Hi Chester,

On Mon, Nov 28, 2022 at 2:49 AM Chester Lin <clin@suse.com> wrote:

> +static struct platform_driver s32g_pinctrl_driver = {
> +       .driver = {
> +               .name = "s32g-siul2-pinctrl",
> +               .owner = THIS_MODULE,
> +               .of_match_table = s32_pinctrl_of_match,
> +               .pm = &s32g_pinctrl_pm_ops,
> +       },
> +       .probe = s32g_pinctrl_probe,
> +       .remove = s32_pinctrl_remove,

Do you really want to allow this pinctrl driver to be removed?

In other imx8m pinctrl drivers we pass:

.suppress_bind_attrs = true,

Check drivers/pinctrl/freescale/pinctrl-imx8mm.c for example.

> +module_platform_driver(s32g_pinctrl_driver);

And we also register it in arch_initcall() level.

Maybe you want to align these points with imx8m?