From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753690AbaIOPJO (ORCPT ); Mon, 15 Sep 2014 11:09:14 -0400 Received: from mail-la0-f43.google.com ([209.85.215.43]:34344 "EHLO mail-la0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752691AbaIOPJM (ORCPT ); Mon, 15 Sep 2014 11:09:12 -0400 MIME-Version: 1.0 In-Reply-To: <20140915144803.GL18566@dragon> References: <7ed21195ebff8b3ccbecaeb492504edd28deea2d.1410253534.git.shengjiu.wang@freescale.com> <20140915115855.GC23877@audiosh1> <20140915144803.GL18566@dragon> Date: Mon, 15 Sep 2014 12:09:10 -0300 Message-ID: Subject: Re: [PATCH V1 1/3] ARM: clk-imx6sl: refine clock tree for SSI From: Fabio Estevam To: Shawn Guo Cc: Shengjiu Wang , Sascha Hauer , Russell King , "robh+dt@kernel.org" , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , linux-kernel , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 15, 2014 at 11:48 AM, Shawn Guo wrote: > Shengjiu, > > Your analysis is right. I hope the following change will get the shared > gate clock code eventually does the right thing. > > Shawn > > diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c > index 84acdfd1d715..89abdf738dc9 100644 > --- a/arch/arm/mach-imx/clk-gate2.c > +++ b/arch/arm/mach-imx/clk-gate2.c > @@ -97,7 +97,7 @@ static int clk_gate2_is_enabled(struct clk_hw *hw) > struct clk_gate2 *gate = to_clk_gate2(hw); > > if (gate->share_count) > - return !!(*gate->share_count); > + return !!__clk_get_enable_count(hw->clk); > else > return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx); This fixes the audio playback, thanks. Tested on a mx6qsabresd and also on mx6sx sdb: Tested-by: Fabio Estevam