From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1569C433E0 for ; Sat, 13 Feb 2021 11:27:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BD8A064E43 for ; Sat, 13 Feb 2021 11:27:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229714AbhBML13 (ORCPT ); Sat, 13 Feb 2021 06:27:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52138 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229598AbhBML1M (ORCPT ); Sat, 13 Feb 2021 06:27:12 -0500 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DE328C061574 for ; Sat, 13 Feb 2021 03:26:30 -0800 (PST) Received: by mail-wm1-x32a.google.com with SMTP id j11so2003345wmi.3 for ; Sat, 13 Feb 2021 03:26:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=k/YMRgzTFrs6z62URGG8KDtcSToOtuKZn+r+kNRlu3Y=; b=gmCvzE9rR946iY1RLr1aaI+s8qM0QQfOH8/UD1RPsDhqxWbwXYyu5fY30ac0LB1AY9 WpK3W7lI5EUNNi3c64WO8QNNVpzD5Iqe4IdeSVmu7ef/tE47got2F/LKtg50uDAP/EbL e4LjzuwmMxhGf52K0uH1z882RAEJMG4gJRNBs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=k/YMRgzTFrs6z62URGG8KDtcSToOtuKZn+r+kNRlu3Y=; b=g/G0WtL9h2HSy8o2mvbuA/Tg3rh+O/gBqXpqiceUPEWNoQlCQsxn3dtSgsJgX5YZ97 45+R4FoLynDqGdtbemPlFqZyLmv/mSZhp3UtLOGhvrddfjgJKsxNADbLF+JVAKmJex0T xsnDvsqHikayI6BgX9LHgApm1kKoC9dM3ywOagF5lglhYAL3yZ66xgM0UrgllSFXHUHy mRW/ZTZEHuOmwQE6vsZ19vUdpjS8v41gbwyS3zi1nzMP/D/eVUOgFwVFc5b+HYfNlQ7w EKOI/bNoK/bLVzIqZGIV8UZJB+x/Rcdoh6H5VlVJLJZu69zdQkJ5yxevYF/yl3fm+DPz Ckwg== X-Gm-Message-State: AOAM530slxRkHYw0eHaY3Org4dlJjh4fsbx8g1r5vJ79lofcDR8V+mEJ CbaJH2kjiI3ZeK/hMqUgdmLPaV45sKqmOERcyRQXcD4r3PLooA== X-Google-Smtp-Source: ABdhPJxg57H5gBCt+CFRR+XKNceZnnXN7lDrf+njVXGixPWG60cuQXEmRR3WzORqbQhd01PWI2R3kIE1HO6tZLuqMZo= X-Received: by 2002:a1c:40d4:: with SMTP id n203mr6410811wma.46.1613215589262; Sat, 13 Feb 2021 03:26:29 -0800 (PST) MIME-Version: 1.0 References: <20210130082128.3778939-1-michael@amarulasolutions.com> In-Reply-To: From: Michael Nazzareno Trimarchi Date: Sat, 13 Feb 2021 12:26:17 +0100 Message-ID: Subject: Re: [PATCH] pinctrl: Support pin that does not support configuration option To: Linus Walleij Cc: Fabio Estevam , Dong Aisheng , "open list:GPIO SUBSYSTEM" , linux-kernel , Sascha Hauer , Angelo Compagnucci Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Fabio On Fri, Feb 12, 2021 at 9:31 AM Michael Nazzareno Trimarchi wrote: > > Hi > > On Fri, Feb 12, 2021 at 9:26 AM Linus Walleij wrote: > > > > On Mon, Feb 1, 2021 at 12:54 PM Michael Nazzareno Trimarchi > > wrote: > > > On Mon, Feb 1, 2021 at 12:47 PM Fabio Estevam wrote: > > > > > > > > Hi Michael, > > > > > > > > On Sat, Jan 30, 2021 at 5:21 AM Michael Trimarchi > > > > wrote: > > > > > > > > > > Some of the iMX25 pins have not an associated configuration register so > > > > > when they are configured the standard way through the device tree the > > > > > kernel complains with: > > > > > > > > > > imx25-pinctrl 43fac000.iomuxc: Pin(MX25_PAD_EXT_ARMCLK) does not support > > > > > config function > > > > > > > > Could you please share your device tree that causes this warning? > > > > > > > > Shouldn't you pass 0x80000000 in the devicetree for this pad then? > > > > > > > > 0x80000000 means that the kernel should not touch the PAD_CTL register > > > > and use the default configuration from the bootloader/POR. > > > > > > arch/arm/boot/dts/imx25-lisa.dts: > > > MX25_PAD_EXT_ARMCLK__GPIO_3_15 0x80000000 > > > > > > The problem that exists pad that can be muxed but not configured > > > > Did you reach any conclusion on this? > > > > I need Fabio's consent to apply the patch, but it seems maybe the > > DTS should be changed instead? > > > > Let me re-check with the latest linux code. I did not find any change > there. It's on my side > now Looking at the code (I will ask to check on real hw) seems that conf_reg is -1 when there is no conf_reg. the pinmux core set_state just calls the pin_config_set and one pin can have the mux supported and the config not supported. And imx25 has several of them that are only muxed. Seems that this NO_CTL_PAD is something that is nxp clk_osc_audio: clk-osc-audio { compatible = "gpio-gate-clock"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_clk26mhz_osc>; clocks = <&clksis>; #clock-cells = <0>; enable-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; }; this is my use case pinctrl_clk26mhz_osc: clk26mhzosc { fsl,pins = < MX25_PAD_EXT_ARMCLK__GPIO_3_15 0x80000000 >; }; Michael > > Michael > > > Yours, > > Linus Walleij > > > > -- > Michael Nazzareno Trimarchi > Amarula Solutions BV > COO Co-Founder > Cruquiuskade 47 Amsterdam 1018 AM NL > T. +31(0)851119172 > M. +39(0)3479132170 > [`as] https://www.amarulasolutions.com -- Michael Nazzareno Trimarchi Amarula Solutions BV COO Co-Founder Cruquiuskade 47 Amsterdam 1018 AM NL T. +31(0)851119172 M. +39(0)3479132170 [`as] https://www.amarulasolutions.com