From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751956AbaHaRfv (ORCPT ); Sun, 31 Aug 2014 13:35:51 -0400 Received: from arrakis.dune.hu ([78.24.191.176]:43674 "EHLO arrakis.dune.hu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751429AbaHaRft (ORCPT ); Sun, 31 Aug 2014 13:35:49 -0400 MIME-Version: 1.0 In-Reply-To: <1409350479-19108-2-git-send-email-abrestic@chromium.org> References: <1409350479-19108-1-git-send-email-abrestic@chromium.org> <1409350479-19108-2-git-send-email-abrestic@chromium.org> From: Jonas Gorski Date: Sun, 31 Aug 2014 19:34:55 +0200 Message-ID: Subject: Re: [PATCH 01/12] MIPS: Provide a generic plat_irq_dispatch To: Andrew Bresticker Cc: Ralf Baechle , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Jeffrey Deans , Markos Chandras , Paul Burton , Thomas Gleixner , Jason Cooper , MIPS Mailing List , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Aug 30, 2014 at 12:14 AM, Andrew Bresticker wrote: > For platforms which boot with device-tree and use the MIPS CPU interrupt > controller binding, a generic plat_irq_dispatch() can be used since all > CPU interrupts should be mapped through the CPU IRQ domain. Implement a > plat_irq_dispatch() which simply handles the highest pending interrupt. > > Signed-off-by: Andrew Bresticker I gave this a short test by hackishly adding IRQ_DOMAIN support to bcm63xx and removing the local plat_irq_dispatch, and it booted fine, and cascaded interrupts were still working. Therefore Tested-by: Jonas Gorski Jonas