From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E4DBC433F5 for ; Mon, 13 Dec 2021 21:08:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242640AbhLMVId (ORCPT ); Mon, 13 Dec 2021 16:08:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49568 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240899AbhLMVI3 (ORCPT ); Mon, 13 Dec 2021 16:08:29 -0500 Received: from mail-yb1-xb2b.google.com (mail-yb1-xb2b.google.com [IPv6:2607:f8b0:4864:20::b2b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FF92C061748 for ; Mon, 13 Dec 2021 13:08:29 -0800 (PST) Received: by mail-yb1-xb2b.google.com with SMTP id q74so41384861ybq.11 for ; Mon, 13 Dec 2021 13:08:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atishpatra.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=qvvfVGKq2r4h6KgjK824L1pTxzdWnyMXPhPq1Abh2Pc=; b=OhnCM8HmOxUmeTJ8oEfNP7AxeaEroLySOUJgpAH2eAjbuT58h22HJ2buXWPJOVx6X4 qsLPi5Li2w+KekHaK76mfwW5ITYXQ4r5QSXKGVpUIgME/enF/XrCu1RYxSft/tAH/vlJ A8LDbv3NW/2XkuLD4ljhVHSd9gsiRLgpv5PUc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=qvvfVGKq2r4h6KgjK824L1pTxzdWnyMXPhPq1Abh2Pc=; b=b8fiR+Q20IWiHQ3TWkeUsd2nE7e8ZalCpfujli7zvA/50S8wK6xPVK4RNXduqIKIXM 5fP8pIJfFFURiOW+si1JMnmHugHUVMeQIXUUtAsRAlWhK4ZX0aDeKVBtmReR5e2zJ+3C EevdW+w34CjfhPZ/QFzQX4p+g56l/SkzvkreEq62V1KA5ygTA1Rz1jMtQhMOnILWLMtS nBWFPvymikn8D/mZ21xLFl4zgn1Ai9LWYDCTiEBtwXI0FoAtXaFn7Xkv2Sfo81sDwlxB 9M4K8RUh34pYuLmg6mSmejXS5t1xaETih7fgRu8LePbxuy0kqQZ/33uBhhmIAiimaJfw F2ZQ== X-Gm-Message-State: AOAM530u+E1BHx9ht/omagG52Iv0yoKmjepj/m7401hrk8lk75amGw9Z ENNWDVDRxve2uEoW4XQ2n+GusZrZ8AvRHOwNfEJI X-Google-Smtp-Source: ABdhPJySH293yyZH4o0ftTnpFHpzJBygH5SyLk84APfDVxuvxrOAU7+LkNTBs3WLK3icgPpUkUlQND5CUFinaUtkqck= X-Received: by 2002:a25:d157:: with SMTP id i84mr988416ybg.703.1639429708496; Mon, 13 Dec 2021 13:08:28 -0800 (PST) MIME-Version: 1.0 References: <20211204002038.113653-1-atishp@atishpatra.org> <20211204002038.113653-6-atishp@atishpatra.org> In-Reply-To: From: Atish Patra Date: Mon, 13 Dec 2021 13:08:17 -0800 Message-ID: Subject: Re: [RFC 5/6] RISC-V: Move spinwait booting method to its own config To: Anup Patel Cc: "linux-kernel@vger.kernel.org List" , Atish Patra , Alexandre Ghiti , Anup Patel , Greentime Hu , Guo Ren , Heinrich Schuchardt , Ingo Molnar , Jisheng Zhang , kvm-riscv@lists.infradead.org, KVM General , linux-riscv , Marc Zyngier , Nanyong Sun , Nick Kossifidis , Palmer Dabbelt , Paul Walmsley , Pekka Enberg , Vincent Chen , Vitaly Wool Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Dec 13, 2021 at 5:02 AM Anup Patel wrote: > > On Sat, Dec 4, 2021 at 5:51 AM Atish Patra wrote: > > > > From: Atish Patra > > > > The spinwait booting method should only be used for platforms with older > > firmware without SBI HSM extension or M-mode firmware because spinwait > > method can't support cpu hotplug, kexec or sparse hartid. It is better > > to move the entire spinwait implementation to its own config which can > > be disabled if required. It is enabled by default to maintain backward > > compatibility and M-mode Linux. > > > > Signed-off-by: Atish Patra > > --- > > arch/riscv/Kconfig | 14 ++++++++++++++ > > arch/riscv/kernel/Makefile | 3 ++- > > arch/riscv/kernel/cpu_ops.c | 8 ++++++++ > > arch/riscv/kernel/head.S | 6 +++--- > > arch/riscv/kernel/head.h | 2 ++ > > 5 files changed, 29 insertions(+), 4 deletions(-) > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > index 821252b65f89..4afb42d5707d 100644 > > --- a/arch/riscv/Kconfig > > +++ b/arch/riscv/Kconfig > > @@ -403,6 +403,20 @@ config RISCV_SBI_V01 > > This config allows kernel to use SBI v0.1 APIs. This will be > > deprecated in future once legacy M-mode software are no longer in use. > > > > +config RISCV_BOOT_SPINWAIT > > + bool "Spinwait booting method" > > + depends on SMP > > + default y > > + help > > + This enables support for booting Linux via spinwait method. In the > > + spinwait method, all cores randomly jump to Linux. One of the core > > + gets chosen via lottery and all other keeps spinning on a percpu > > + variable. This method can not support cpu hotplug and sparse hartid > > + scheme. It should be only enabled for M-mode Linux or platforms relying > > + on older firmware without SBI HSM extension. All other platform should > > + rely on ordered booing via SBI HSM extension which gets chosen > > + dynamically at runtime if the firmware supports it. > > + > > config KEXEC > > bool "Kexec system call" > > select KEXEC_CORE > > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > > index 3397ddac1a30..612556faa527 100644 > > --- a/arch/riscv/kernel/Makefile > > +++ b/arch/riscv/kernel/Makefile > > @@ -43,7 +43,8 @@ obj-$(CONFIG_FPU) += fpu.o > > obj-$(CONFIG_SMP) += smpboot.o > > obj-$(CONFIG_SMP) += smp.o > > obj-$(CONFIG_SMP) += cpu_ops.o > > -obj-$(CONFIG_SMP) += cpu_ops_spinwait.o > > + > > +obj-$(CONFIG_RISCV_BOOT_SPINWAIT) += cpu_ops_spinwait.o > > obj-$(CONFIG_MODULES) += module.o > > obj-$(CONFIG_MODULE_SECTIONS) += module-sections.o > > > > diff --git a/arch/riscv/kernel/cpu_ops.c b/arch/riscv/kernel/cpu_ops.c > > index c1e30f403c3b..170d07e57721 100644 > > --- a/arch/riscv/kernel/cpu_ops.c > > +++ b/arch/riscv/kernel/cpu_ops.c > > @@ -15,7 +15,15 @@ > > const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init; > > > > extern const struct cpu_operations cpu_ops_sbi; > > +#ifdef CONFIG_RISCV_BOOT_SPINWAIT > > extern const struct cpu_operations cpu_ops_spinwait; > > +#else > > +const struct cpu_operations cpu_ops_spinwait = { > > + .name = "", > > + .cpu_prepare = NULL, > > + .cpu_start = NULL, > > +}; > > +#endif > > > > void __init cpu_set_ops(int cpuid) > > { > > diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S > > index 9f16bfe9307e..4a694e15b95b 100644 > > --- a/arch/riscv/kernel/head.S > > +++ b/arch/riscv/kernel/head.S > > @@ -259,7 +259,7 @@ pmp_done: > > li t0, SR_FS > > csrc CSR_STATUS, t0 > > > > -#ifdef CONFIG_SMP > > +#ifdef CONFIG_RISCV_BOOT_SPINWAIT > > li t0, CONFIG_NR_CPUS > > blt a0, t0, .Lgood_cores > > tail .Lsecondary_park > > @@ -285,7 +285,7 @@ pmp_done: > > beq t0, t1, .Lsecondary_start > > > > #endif /* CONFIG_XIP */ > > -#endif /* CONFIG_SMP */ > > +#endif /* CONFIG_RISCV_BOOT_SPINWAIT */ > > > > #ifdef CONFIG_XIP_KERNEL > > la sp, _end + THREAD_SIZE > > @@ -344,7 +344,7 @@ clear_bss_done: > > call soc_early_init > > tail start_kernel > > > > -#ifdef CONFIG_SMP > > +#if defined(CONFIG_SMP) && defined(CONFIG_RISCV_BOOT_SPINWAIT) > > The RISCV_BOOT_SPINWAIT option already depends on SMP. > > Do you still need to check defined(CONFIG_SMP) here ? > Nope. I guess this one slipped through the cracks. All other related #ifdef have only CONFIG_RISCV_BOOT_SPINWAIT I will fix it in v2. > Regards, > Anup > > > .Lsecondary_start: > > /* Set trap vector to spin forever to help debug */ > > la a3, .Lsecondary_park > > diff --git a/arch/riscv/kernel/head.h b/arch/riscv/kernel/head.h > > index 5393cca77790..726731ada534 100644 > > --- a/arch/riscv/kernel/head.h > > +++ b/arch/riscv/kernel/head.h > > @@ -16,7 +16,9 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa); > > asmlinkage void __init __copy_data(void); > > #endif > > > > +#ifdef CONFIG_RISCV_BOOT_SPINWAIT > > extern void *__cpu_spinwait_stack_pointer[]; > > extern void *__cpu_spinwait_task_pointer[]; > > +#endif > > > > #endif /* __ASM_HEAD_H */ > > -- > > 2.33.1 > > -- Regards, Atish