From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ACBD4C43214 for ; Mon, 9 Aug 2021 12:14:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8CC2360F35 for ; Mon, 9 Aug 2021 12:14:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235400AbhHIMOW (ORCPT ); Mon, 9 Aug 2021 08:14:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42402 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235095AbhHIMOQ (ORCPT ); Mon, 9 Aug 2021 08:14:16 -0400 Received: from mail-ua1-x92a.google.com (mail-ua1-x92a.google.com [IPv6:2607:f8b0:4864:20::92a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A3693C0613D3 for ; Mon, 9 Aug 2021 05:13:55 -0700 (PDT) Received: by mail-ua1-x92a.google.com with SMTP id v3so6900614uau.3 for ; Mon, 09 Aug 2021 05:13:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=0zVmmfKjsh0O6iTcBeLVuCbww8hMd82b9Le3k2jDVtU=; b=IeN4102EglVq6qp9hh2HqtonBYVIky9VwVBQB6Gvbk+p1dYiI/3JCTZFyt6RjAOCVv SqVs6vpO9EUQgvDdFVlfIjUDD8jC9JEHJ0k6yvutzVOurcWoI/mtDoElrZnSG6JWdYeq OsIuCcaSyg1a4ujJK5zzLSSHRi3Ybw8Pv50hFnG9kLxd9oEq/cs984/0nNA3VJnGH4w0 +ikRhA9yD6YgAOxn2aGfVdKuastyUfRBd215VG7V9YBL3ivYajvZSTNHdD8y6ZKW3J+U ZPIjod43oKSb14ICuisE/yhq+7hHgX0/Hcns0tK7u2E45Uk8dDBL2btJraHiPbaGp/EV sIXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=0zVmmfKjsh0O6iTcBeLVuCbww8hMd82b9Le3k2jDVtU=; b=RLqcKf8ICg/qyQptkmQWJxtfIQMWrso+3OOzHxYloCP+wvq+ZLkt2LgV2JIwPQTxkh crkO20dfY30ZG0pDrOigFEWFC38HHkN0Qq9i3Ev+b6dawqn4mPPfvCdBRjKb6zqSQOYB xGBFSDsciRPvDhHh5eKPrDrqfpG153Gihtn5HMdmf1LxzdOAkOaiuILb+gpM4n1gV+AG Mrl4w0vNLrnjICB0rTk3bpK3M+cZOaZio4YY+yLZslxNcm/+h4Gx+bXZ8CXMZUcA8f6x CCmsa9bRfurSCJXeL7mehKDS7Ju5NfmtwhEe6mPE0cr2ZGr6ZiRPN8cRxYstAx/cVgFw yXfw== X-Gm-Message-State: AOAM5315TbcsmAwZSPda3keeUIv/BY3fqKplRnsWzsuyvQ8PLEQiUnkj xmRd+EVh3P1WkaIS0nWQSJuhli+4e+lFb1KM0kUvvg== X-Google-Smtp-Source: ABdhPJyEN/N8WiArAmLbZiGvWNJvbwnRfJLMyXEkrASw8j5gZV6393JjHpibblCKurC+9vhkAUpbaDe81QmpxRZ+PiE= X-Received: by 2002:a9f:25a7:: with SMTP id 36mr14751050uaf.129.1628511234750; Mon, 09 Aug 2021 05:13:54 -0700 (PDT) MIME-Version: 1.0 References: <20210730063309.8194-1-rashmi.a@intel.com> <20210730063309.8194-3-rashmi.a@intel.com> In-Reply-To: From: Ulf Hansson Date: Mon, 9 Aug 2021 14:13:18 +0200 Message-ID: Subject: Re: [PATCH 2/3] mmc: sdhci-of-arasan: Add intel Thunder Bay SOC support to the arasan eMMC driver To: "A, Rashmi" Cc: Vinod Koul , Michal Simek , linux-mmc , Linux ARM , Linux Kernel Mailing List , Kishon , Andy Shevchenko , "linux-phy@lists.infradead.org" , Mark Gross , "kris.pan@linux.intel.com" , "Zhou, Furong" , "Sangannavar, Mallikarjunappa" , "Hunter, Adrian" , "Vaidya, Mahesh R" , "Srikandan, Nandhini" , "Demakkanavar, Kenchappa" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 9 Aug 2021 at 13:17, A, Rashmi wrote: > > > > > -----Original Message----- > > From: Vinod Koul > > Sent: Monday, August 9, 2021 2:12 PM > > To: A, Rashmi > > Cc: Ulf Hansson ; Michal Simek > > ; linux-mmc ; Linux > > ARM ; Linux Kernel Mailing List > kernel@vger.kernel.org>; Kishon ; Andy Shevchenko > > ; linux-phy@lists.infradead.org; Mark > > Gross ; kris.pan@linux.intel.com; Zhou, Furong > > ; Sangannavar, Mallikarjunappa > > ; Hunter, Adrian > > ; Vaidya, Mahesh R > > ; Srikandan, Nandhini > > ; Demakkanavar, Kenchappa > > > > Subject: Re: [PATCH 2/3] mmc: sdhci-of-arasan: Add intel Thunder Bay SOC > > support to the arasan eMMC driver > > > > On 09-08-21, 05:16, A, Rashmi wrote: > > > > > > > > > > Rashmi, is it safe to apply this separately from the phy driver/dt changes? > > > > Then I can queue this via my mmc tree, if you like. > > > No, the phy driver/dt changes must go together with "mmc: sdhci-of- > > arasan: Add intel Thunder Bay SOC support to the arasan eMMC driver" > > patch. > > > > Why is that? > > > > What could happen, emmc driver will complain about phy not found and bail > > right? > This is right, but ideally both mmc:phy and mmc: sdhci-of-arasan driver code changes should go together If patches are well written and can be standalone, we (maintainers) ideally prefer to queue things on a per subsystem basis, because it's just easier. That said, I also noticed that a new compatible string was added, "intel,thunderbay-sdhci-5.1". This needs to be documented in Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml, in a separate patch, preceding $subject patch. Kind regards Uffe