From: Ulf Hansson <ulf.hansson@linaro.org>
To: Renius Chen <reniuschengl@gmail.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Ben Chuang <ben.chuang@genesyslogic.com.tw>,
greg.tu@genesyslogic.com.tw
Subject: Re: [PATCH] mmc: sdhci-pci-gli: Finetune HS400 RX delay for GL9763E
Date: Tue, 19 Jan 2021 14:42:55 +0100 [thread overview]
Message-ID: <CAPDyKFqnLTas50enA32MoKyx6ivZiJ5H+X5HJLPzS=nQ_b-UFw@mail.gmail.com> (raw)
In-Reply-To: <20210111082249.17092-1-reniuschengl@gmail.com>
On Mon, 11 Jan 2021 at 09:22, Renius Chen <reniuschengl@gmail.com> wrote:
>
> To improve the compatibility of GL9763E with HS400 eMMC cards,
> finetune the RX delay of HS400 mode.
>
> Signed-off-by: Renius Chen <reniuschengl@gmail.com>
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-pci-gli.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 2d13bfcbcacf..14d9154f3af1 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -95,6 +95,10 @@
> #define PCIE_GLI_9763E_MMC_CTRL 0x960
> #define GLI_9763E_HS400_SLOW BIT(3)
>
> +#define PCIE_GLI_9763E_CLKRXDLY 0x934
> +#define GLI_9763E_HS400_RXDLY GENMASK(31, 28)
> +#define GLI_9763E_HS400_RXDLY_5 0x5
> +
> #define SDHCI_GLI_9763E_CQE_BASE_ADDR 0x200
> #define GLI_9763E_CQE_TRNS_MODE (SDHCI_TRNS_MULTI | \
> SDHCI_TRNS_BLK_CNT_EN | \
> @@ -801,6 +805,11 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
> value |= FIELD_PREP(GLI_9763E_CFG2_L1DLY, GLI_9763E_CFG2_L1DLY_MAX);
> pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG2, value);
>
> + pci_read_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, &value);
> + value &= ~GLI_9763E_HS400_RXDLY;
> + value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
> + pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
> +
> pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
> value &= ~GLI_9763E_VHS_REV;
> value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
> --
> 2.27.0
>
prev parent reply other threads:[~2021-01-20 0:19 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-11 8:22 [PATCH] mmc: sdhci-pci-gli: Finetune HS400 RX delay for GL9763E Renius Chen
2021-01-19 13:42 ` Ulf Hansson [this message]
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