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From: "Ismail, Mohammad Athari" <mohammad.athari.ismail@intel.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Heiner Kallweit <hkallweit1@gmail.com>,
	"David S . Miller" <davem@davemloft.net>,
	Russell King <linux@armlinux.org.uk>,
	Jakub Kicinski <kuba@kernel.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH net] net: phy: reconfigure PHY WOL in resume if WOL option still enabled
Date: Thu, 8 Jul 2021 23:11:43 +0000	[thread overview]
Message-ID: <CO1PR11MB4771B370A58C83F13C39EED0D5199@CO1PR11MB4771.namprd11.prod.outlook.com> (raw)
In-Reply-To: <YOb5cy2giMYO1V5U@lunn.ch>



> -----Original Message-----
> From: Andrew Lunn <andrew@lunn.ch>
> Sent: Thursday, July 8, 2021 9:11 PM
> To: Ismail, Mohammad Athari <mohammad.athari.ismail@intel.com>
> Cc: Heiner Kallweit <hkallweit1@gmail.com>; David S . Miller
> <davem@davemloft.net>; Russell King <linux@armlinux.org.uk>; Jakub
> Kicinski <kuba@kernel.org>; Florian Fainelli <f.fainelli@gmail.com>;
> netdev@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH net] net: phy: reconfigure PHY WOL in resume if WOL
> option still enabled
> 
> > Hi Andrew,
> >
> > In our platform, the PHY interrupt pin is not connected to Host CPU. So, the
> CPU couldn`t service the PHY interrupt.  The PHY interrupt pin is connected to
> a power management controller (PMC) as a HW wake up signal. The PMC
> itself couldn't act as interrupt controller to service the PHY interrupt.
> >
> > During WOL event, the WOL signal is sent to PMC through the PHY interrupt
> pin to wake up the PMC. Then, the PMC will wake up the Host CPU and the
> whole system.
> 
> How is the PMC connected to the host? LPC? At wake up can you ask it why it
> woke you up? What event it was, power restored, power button press, or
> WOL? Can the PMC generate interrupts over the LPC? What PMC is it? Is
> there a datasheet for it?
> 
> Getting your architecture correct will also solve your S3/S4 problems.

Hi Andrew,

I'll try to get more info from our architecture design team.

-Athari-

> 
>     Andrew

      reply	other threads:[~2021-07-08 23:12 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-08  0:42 mohammad.athari.ismail
2021-07-08  1:23 ` Andrew Lunn
2021-07-08  2:48   ` Florian Fainelli
2021-07-08 10:10     ` Ismail, Mohammad Athari
2021-07-08 16:41       ` Florian Fainelli
2021-07-08 23:20         ` Ismail, Mohammad Athari
2021-07-08 23:22           ` Florian Fainelli
2021-07-09  1:30             ` Andrew Lunn
2021-07-09  9:57         ` Russell King (Oracle)
2021-07-08 10:02   ` Ismail, Mohammad Athari
2021-07-08 13:11     ` Andrew Lunn
2021-07-08 23:11       ` Ismail, Mohammad Athari [this message]

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