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Thu, 10 Dec 2020 01:22:27 +0000 From: "Sia, Jee Heng" To: Rob Herring CC: "vkoul@kernel.org" , "Eugeniy.Paltsev@synopsys.com" , "andriy.shevchenko@linux.intel.com" , "dmaengine@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: RE: [PATCH v5 01/16] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Thread-Topic: [PATCH v5 01/16] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Thread-Index: AQHWx2fKbqfRLAl8MEqd0Cuha40uEqnuI3UQgAFzNyA= Date: Thu, 10 Dec 2020 01:22:27 +0000 Message-ID: References: <20201123023452.7894-1-jee.heng.sia@intel.com> <20201123023452.7894-2-jee.heng.sia@intel.com> <20201130222547.GA3123716@robh.at.kernel.org> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.5.1.3 authentication-results: kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.198.147.218] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c1ef3207-0e03-4048-7d52-08d89caa0e6c x-ms-traffictypediagnostic: MWHPR11MB1646: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:2958; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO1PR11MB5026.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c1ef3207-0e03-4048-7d52-08d89caa0e6c X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Dec 2020 01:22:27.2114 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 6wO8HuLQ/bW/idxrsPAJqN33U2nYYGkPnL0t8fSWiJQT3eDYo9rF4wDDpuioIbSWiOERYjgyB/ITdo7tM/qwFA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR11MB1646 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, I think I still need the 'ref', but can remove the 'allOf'.=20 Thanks Regards Jee Heng > -----Original Message----- > From: Sia, Jee Heng > Sent: 09 December 2020 11:21 AM > To: Rob Herring > Cc: vkoul@kernel.org; Eugeniy.Paltsev@synopsys.com; > andriy.shevchenko@linux.intel.com; dmaengine@vger.kernel.org; > linux-kernel@vger.kernel.org; devicetree@vger.kernel.org > Subject: RE: [PATCH v5 01/16] dt-bindings: dma: Add YAML schemas > for dw-axi-dmac >=20 > Hi Rob, >=20 > Regarding the comment " You don't need to use allOf with a $ref > anymore." > I get dt compile error after remove the allOf and $ref. Error message > shown below: > '$ref' is a required property > 'allOf' is a required property >=20 > snps,dma-masters: > description: | > Number of AXI masters supported by the hardware. > enum: [1, 2] > default: 2 >=20 > Thanks > Regards > Jee Heng >=20 > > -----Original Message----- > > From: Rob Herring > > Sent: 01 December 2020 6:26 AM > > To: Sia, Jee Heng > > Cc: vkoul@kernel.org; Eugeniy.Paltsev@synopsys.com; > > andriy.shevchenko@linux.intel.com; dmaengine@vger.kernel.org; > > linux-kernel@vger.kernel.org; devicetree@vger.kernel.org > > Subject: Re: [PATCH v5 01/16] dt-bindings: dma: Add YAML schemas > for > > dw-axi-dmac > > > > On Mon, Nov 23, 2020 at 10:34:37AM +0800, Sia Jee Heng wrote: > > > YAML schemas Device Tree (DT) binding is the new format for DT > to > > > replace the old format. Introduce YAML schemas DT binding for > > > dw-axi-dmac and remove the old version. > > > > > > Signed-off-by: Sia Jee Heng > > > --- > > > .../bindings/dma/snps,dw-axi-dmac.txt | 39 ------ > > > .../bindings/dma/snps,dw-axi-dmac.yaml | 126 > > ++++++++++++++++++ > > > 2 files changed, 126 insertions(+), 39 deletions(-) delete mode > > > 100644 Documentation/devicetree/bindings/dma/snps,dw-axi- > > dmac.txt > > > create mode 100644 > > > Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml > > > > > > diff --git > > > a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt > > > b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt > > > deleted file mode 100644 > > > index dbe160400adc..000000000000 > > > --- a/Documentation/devicetree/bindings/dma/snps,dw-axi- > > dmac.txt > > > +++ /dev/null > > > @@ -1,39 +0,0 @@ > > > -Synopsys DesignWare AXI DMA Controller > > > - > > > -Required properties: > > > -- compatible: "snps,axi-dma-1.01a" > > > -- reg: Address range of the DMAC registers. This should include > > > - all of the per-channel registers. > > > -- interrupt: Should contain the DMAC interrupt number. > > > -- dma-channels: Number of channels supported by hardware. > > > -- snps,dma-masters: Number of AXI masters supported by the > > hardware. > > > -- snps,data-width: Maximum AXI data width supported by > hardware. > > > - (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits) > > > -- snps,priority: Priority of channel. Array size is equal to the > > > number of > > > - dma-channels. Priority value must be programmed within > > > [0:dma-channels-1] > > > - range. (0 - minimum priority) > > > -- snps,block-size: Maximum block size supported by the controller > > channel. > > > - Array size is equal to the number of dma-channels. > > > - > > > -Optional properties: > > > -- snps,axi-max-burst-len: Restrict master AXI burst length by value > > > specified > > > - in this property. If this property is missing the maximum AXI > > > burst length > > > - supported by DMAC is used. [1:256] > > > - > > > -Example: > > > - > > > -dmac: dma-controller@80000 { > > > - compatible =3D "snps,axi-dma-1.01a"; > > > - reg =3D <0x80000 0x400>; > > > - clocks =3D <&core_clk>, <&cfgr_clk>; > > > - clock-names =3D "core-clk", "cfgr-clk"; > > > - interrupt-parent =3D <&intc>; > > > - interrupts =3D <27>; > > > - > > > - dma-channels =3D <4>; > > > - snps,dma-masters =3D <2>; > > > - snps,data-width =3D <3>; > > > - snps,block-size =3D <4096 4096 4096 4096>; > > > - snps,priority =3D <0 1 2 3>; > > > - snps,axi-max-burst-len =3D <16>; > > > -}; > > > diff --git > > > a/Documentation/devicetree/bindings/dma/snps,dw-axi- > dmac.yaml > > > b/Documentation/devicetree/bindings/dma/snps,dw-axi- > dmac.yaml > > > new file mode 100644 > > > index 000000000000..6c2e8e612af5 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi- > > dmac.yaml > > > @@ -0,0 +1,126 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > %YAML > > 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/dma/snps,dw-axi- > dmac.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Synopsys DesignWare AXI DMA Controller > > > + > > > +maintainers: > > > + - Eugeniy Paltsev > > + > > > +description: | > > > > Don't need '|' unless there's formatting to preserve. > > > > > + Synopsys DesignWare AXI DMA Controller DT Binding > > > > And should be 2 space indent. > > > > > + > > > +properties: > > > + compatible: > > > + enum: > > > + - snps,axi-dma-1.01a > > > + > > > + reg: > > > + items: > > > + - description: Address range of the DMAC registers > > > > Just 'maxItems: 1' > > > > > + > > > + reg-names: > > > + items: > > > + - const: axidma_ctrl_regs > > > + > > > + interrupts: > > > + maxItems: 1 > > > + > > > + clocks: > > > + items: > > > + - description: Bus Clock > > > + - description: Module Clock > > > + > > > + clock-names: > > > + items: > > > + - const: core-clk > > > + - const: cfgr-clk > > > + > > > + '#dma-cells': > > > + const: 1 > > > + > > > + dma-channels: > > > + description: | > > > + Number of channels supported by hardware. > > > > No need to describe a common property. You do need to provide > some > > constraints. I'd assume there's less than 2^32 channels. > > > > > + > > > + snps,dma-masters: > > > + description: | > > > + Number of AXI masters supported by the hardware. > > > + allOf: > > > > You don't need to use allOf with a $ref anymore. > > > > > + - $ref: /schemas/types.yaml#/definitions/uint32 > > > + - enum: [1, 2] > > > + default: 2 > > > + > > > + snps,data-width: > > > + description: | > > > + AXI data width supported by hardware. > > > + (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits) > > > + allOf: > > > + - $ref: /schemas/types.yaml#/definitions/uint32 > > > + - enum: [0, 1, 2, 3, 4, 5, 6] > > > + default: 4 > > > + > > > + snps,priority: > > > + description: | > > > + Channel priority specifier associated with the DMA channels. > > > + allOf: > > > + - $ref: /schemas/types.yaml#/definitions/uint32-array > > > + - minItems: 1 > > > + maxItems: 8 > > > + default: [0, 1, 2, 3] > > > + > > > + snps,block-size: > > > + description: | > > > + Channel block size specifier associated with the DMA > channels. > > > + allOf: > > > + - $ref: /schemas/types.yaml#/definitions/uint32-array > > > + - minItems: 1 > > > + maxItems: 8 > > > + default: [4096, 4096, 4096, 4096] > > > + > > > + snps,axi-max-burst-len: > > > + description: | > > > + Restrict master AXI burst length by value specified in this > > property. > > > + If this property is missing the maximum AXI burst length > > supported by > > > + DMAC is used. [1:256] > > > > Looks like some constraints. > > > > > + allOf: > > > + - $ref: /schemas/types.yaml#/definitions/uint32 > > > + default: 16 > > > + > > > +required: > > > + - compatible > > > + - reg > > > + - clocks > > > + - clock-names > > > + - interrupts > > > + - '#dma-cells' > > > + - dma-channels > > > + - snps,dma-masters > > > + - snps,data-width > > > + - snps,priority > > > + - snps,block-size > > > + > > > +additionalProperties: false > > > + > > > +examples: > > > + - | > > > + #include > > > + #include > > > + /* example with snps,dw-axi-dmac */ > > > + dmac: dma-controller@80000 { > > > + compatible =3D "snps,axi-dma-1.01a"; > > > + reg =3D <0x80000 0x400>; > > > + clocks =3D <&core_clk>, <&cfgr_clk>; > > > + clock-names =3D "core-clk", "cfgr-clk"; > > > + interrupt-parent =3D <&intc>; > > > + interrupts =3D <27>; > > > + #dma-cells =3D <1>; > > > + dma-channels =3D <4>; > > > + snps,dma-masters =3D <2>; > > > + snps,data-width =3D <3>; > > > + snps,block-size =3D <4096 4096 4096 4096>; > > > + snps,priority =3D <0 1 2 3>; > > > + snps,axi-max-burst-len =3D <16>; > > > + }; > > > -- > > > 2.18.0 > > >