From: Bhaskara Budiredla <bbudiredla@marvell.com>
To: Bhaskara Budiredla <bbudiredla@marvell.com>,
"will@kernel.org" <will@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
Sunil Kovvuri Goutham <sgoutham@marvell.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v5 0/2] drivers: perf: Add Marvell CN10K LLC-TAD pmu driver
Date: Thu, 30 Sep 2021 09:22:25 +0000 [thread overview]
Message-ID: <CY4PR1801MB207038FD04A714BF15DA88A3DEAA9@CY4PR1801MB2070.namprd18.prod.outlook.com> (raw)
In-Reply-To: <20210908120425.10084-1-bbudiredla@marvell.com>
Hi Will,
Rob has Acked DT bindings. Do you have any further review comments?
Thanks,
Bhaskara
>-----Original Message-----
>From: Bhaskara Budiredla <bbudiredla@marvell.com>
>Sent: Wednesday, September 8, 2021 5:34 PM
>To: will@kernel.org; mark.rutland@arm.com; robh+dt@kernel.org; Sunil
>Kovvuri Goutham <sgoutham@marvell.com>
>Cc: linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; linux-
>kernel@vger.kernel.org; Bhaskara Budiredla <bbudiredla@marvell.com>
>Subject: [PATCH v5 0/2] drivers: perf: Add Marvell CN10K LLC-TAD pmu driver
>
>This series introduces performance monitor driver to Last-level-cache tag-
>and-data (LLC-TAD) PMU which is an intergral part of Marvell CN10K SoCs.
>The configuration and functionality of the TAD PMU is covered in patch 1.
>The device tree bindings are dealt in patch 2.
>
>v5:
> - add prefix, type, description for vendor specific properties
> in DT bindings (Rob Herring)
>
>v4:
> - rebased on kernel v5.14-rc7
> - eliminate yamllint errors (Rob Herring)
>
>v3:
> - rebased on kernel v5.14-rc5
> - disable sampling events via PERF_PMU_CAP_NO_INTERRUPT (Will Deacon)
> - convert tad pmu bindings to schema (Will Deacon)
> - replace tighter semantics with *_relaxed() accesses (Will Deacon)
> - use PMU_EVENT_ATTR_ID generic macro (Will Deacon)
> - allow cleanup of allocations through devm_kcalloc() (Will Deacon)
>
>v2:
> - rebased on kernel v5.13-rc3
>
>Bhaskara Budiredla (2):
> drivers: perf: Add LLC-TAD perf counter support
> dt-bindings: perf: Add YAML schemas for Marvell CN10K LLC-TAD pmu
> bindings
>
> .../bindings/perf/marvell-cn10k-tad.yaml | 63 +++
> drivers/perf/Kconfig | 7 +
> drivers/perf/Makefile | 1 +
> drivers/perf/marvell_cn10k_tad_pmu.c | 430 ++++++++++++++++++
> 4 files changed, 501 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/perf/marvell-
>cn10k-tad.yaml
> create mode 100644 drivers/perf/marvell_cn10k_tad_pmu.c
>
>--
>2.17.1
next prev parent reply other threads:[~2021-09-30 9:22 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-08 12:04 [PATCH v5 0/2] drivers: perf: Add Marvell CN10K LLC-TAD pmu driver Bhaskara Budiredla
2021-09-08 12:04 ` [PATCH v5 1/2] drivers: perf: Add LLC-TAD perf counter support Bhaskara Budiredla
2021-10-12 7:45 ` Bharat Bhushan
2021-10-12 9:29 ` [EXT] " Bhaskara Budiredla
2021-09-08 12:04 ` [PATCH v5 2/2] dt-bindings: perf: Add YAML schemas for Marvell CN10K LLC-TAD pmu bindings Bhaskara Budiredla
2021-09-16 20:13 ` Rob Herring
2021-09-30 9:22 ` Bhaskara Budiredla [this message]
2021-10-07 6:30 ` [PATCH v5 0/2] drivers: perf: Add Marvell CN10K LLC-TAD pmu driver Bhaskara Budiredla
2021-10-11 12:08 ` Will Deacon
2021-10-12 6:29 ` [EXT] " Bhaskara Budiredla
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