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From: Venu Byravarasu <vbyravarasu@nvidia.com>
To: "dedekind1@gmail.com" <dedekind1@gmail.com>,
	"Nicolas Ferre" <nicolas.ferre@atmel.com>,
	"Voss, Nikolaus" <N.Voss@weinmann.de>,
	"Eric Bénard" <eric@eukrea.com>
Cc: "'linux-mtd@lists.infradead.org'" <linux-mtd@lists.infradead.org>,
	"'linux-kernel@vger.kernel.org'" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH] mtd: atmel_nand: fix access to 16 bit NAND devices
Date: Fri, 3 Feb 2012 09:05:29 +0530	[thread overview]
Message-ID: <D958900912E20642BCBC71664EFECE3E6DD0B99114@BGMAIL02.nvidia.com> (raw)
In-Reply-To: <1328184370.28171.175.camel@sauron.fi.intel.com>

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I see a problem with atmel_read_buf16 & atmel_write_buf16 functions.
As they are calling __raw_readsw & __raw_writesw respectively, which 
would cause panic in cases of 16 bit unaligned buffers.
However, the buf passed to these functions is of type u8* from 
atmel_read_buf & atmel_write_buf functions.

[Venu] 
> -	/* if no DMA operation possible, use PIO */
> -	memcpy_fromio(buf, chip->IO_ADDR_R, len);
> +	if (host->board->bus_width_16)
> +		atmel_read_buf16(mtd, buf, len);

> +	else
> +		atmel_read_buf8(mtd, buf, len);
>  }
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  reply	other threads:[~2012-02-03  3:35 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-01-18  9:16 [PATCH] mtd: atmel_nand: fix access to 16 bit NAND devices Nikolaus Voss
2012-01-27 13:29 ` Artem Bityutskiy
2012-01-30  7:57   ` Voss, Nikolaus
2012-01-30  8:57     ` Nicolas Ferre
2012-02-01 10:43       ` Eric Bénard
2012-02-02 12:06       ` Artem Bityutskiy
2012-02-03  3:35         ` Venu Byravarasu [this message]
2012-02-03  5:32           ` Artem Bityutskiy

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