From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1162600AbbKTL7i (ORCPT ); Fri, 20 Nov 2015 06:59:38 -0500 Received: from mail-am1on0084.outbound.protection.outlook.com ([157.56.112.84]:19680 "EHLO emea01-am1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1757406AbbKTL7g convert rfc822-to-8bit (ORCPT ); Fri, 20 Nov 2015 06:59:36 -0500 From: Noam Camus To: Thomas Gleixner CC: "linux-snps-arc@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Tal Zilcer , Gil Fruchter , Chris Metcalf , Daniel Lezcano , "Rob Herring" , John Stultz Subject: RE: [PATCH v2 03/19] clocksource: Add NPS400 timers driver Thread-Topic: [PATCH v2 03/19] clocksource: Add NPS400 timers driver Thread-Index: AQHRGUq03+ZPsqXl6Uu9+CUfvR9xep6Qa54AgBR1w7A= Date: Fri, 20 Nov 2015 11:59:32 +0000 Message-ID: References: <1446297327-16298-1-git-send-email-noamc@ezchip.com> <1446893557-29748-4-git-send-email-noamc@ezchip.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=noamc@ezchip.com; x-originating-ip: [212.179.42.66] x-microsoft-exchange-diagnostics: 1;DB5PR02MB1143;5:ZRP+6KGtXaM6DWcAgMDr6z17nDwiGVEqCrjOnw+2TjcLtVpkyWQs9sidiXHk3ohlyrWh/YzMugGhLXWyzFfzgHHDoQqz+X03ggaSZpygHCLO9lGyKd84Y7NbpAfl08ZiCXIS9QIjMr22nrIS2d5woQ==;24:4CchboZEBz4HH97orctqCKwgPKU4NT82bvbYyIxGX4WAoYO/VdGtmQLhP+4y3XbCfSpiBME0NPzUmQkDfDPoMZPtO4946P6k8q+Hu7Rtgzw=;20:3wrIc1x42uWne0BwX2Ge4shB5/yuS4EZHDDQBuU8JGDgqSWy4kH3xtnv0QR4zBN0Nu/bi6ro5y5UH6DWCW5v/g== x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:DB5PR02MB1143; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(2401047)(8121501046)(520078)(5005006)(10201501046)(3002001);SRVR:DB5PR02MB1143;BCL:0;PCL:0;RULEID:;SRVR:DB5PR02MB1143; x-forefront-prvs: 07665BE9D1 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(199003)(189002)(377454003)(77096005)(11100500001)(122556002)(54356999)(5002640100001)(5007970100001)(76176999)(2950100001)(33656002)(5003600100002)(2900100001)(110136002)(50986999)(81156007)(5004730100002)(87936001)(97736004)(40100003)(76576001)(101416001)(10400500002)(189998001)(5001960100002)(3846002)(105586002)(106356001)(66066001)(106116001)(19580395003)(74316001)(86362001)(6116002)(586003)(102836003)(92566002)(5008740100001)(19580405001);DIR:OUT;SFP:1101;SCL:1;SRVR:DB5PR02MB1143;H:DB5PR02MB1141.eurprd02.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;A:1;MX:1;LANG:en; spamdiagnosticoutput: 1:23 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: ezchip.com X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Nov 2015 11:59:32.5745 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 0fc16e0a-3cd3-4092-8b2f-0a42cff122c3 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR02MB1143 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >From: Thomas Gleixner [mailto:tglx@linutronix.de] >Sent: Saturday, November 07, 2015 1:26 PM >So that clocksource goes up to 1GHz. That means u32 fits ~4.29 seconds. Unless you are striving for NOHZ idle sleep times above that there is no point in doing that 64bit dance. > >The timekeeping code is perfectly fine with a 32bit value. You just have to set the proper mask. We do it because we do indeed care very much for long NOHZ idle (and full) times on NPS, hence the song and dance. -Noam