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From: Biwen Li <biwen.li@nxp.com>
To: Rasmus Villemoes <linux@rasmusvillemoes.dk>,
	"Biwen Li (OSS)" <biwen.li@oss.nxp.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	Leo Li <leoyang.li@nxp.com>, "Z.q. Hou" <zhiqiang.hou@nxp.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"jason@lakedaemon.net" <jason@lakedaemon.net>,
	"maz@kernel.org" <maz@kernel.org>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Jiafei Pan <jiafei.pan@nxp.com>, Xiaobo Xie <xiaobo.xie@nxp.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>
Subject: RE: [EXT] Re: [v2 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt
Date: Tue, 27 Oct 2020 07:48:17 +0000	[thread overview]
Message-ID: <DB6PR0401MB2438ED1C8F629CA1E1F469768F160@DB6PR0401MB2438.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <5b1f2911-98b3-511f-404b-7d0fa44cc0c2@rasmusvillemoes.dk>

> 
> Caution: EXT Email
> 
> On 27/10/2020 05.46, Biwen Li wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > Add an new IRQ chip declaration for LS1043A and LS1088A
> > - compatible "fsl,ls1043a-extirq" for LS1043A, LS1046A. SCFG_INTPCR[31:0]
> >   of these SoCs is stored/read as SCFG_INTPCR[0:31] defaultly(bit
> >   reverse)
> 
> s/defaultly/by default/ I suppose. But what does that mean? Is it still
> configurable, just now through some undocumented register? If that register
> still exists, does it now have a reset value of all-ones as opposed to the ls1021
> case? If it's not configurable, then describing the situation as "by default" is
> confusing and wrong, it should just say "On LS1043A, LS1046A, SCFG_INTPCR
> is stored/read bit-reversed."
Okay, got it. Will update it in v3. Thanks.
> 
> 
> > - compatible "fsl,ls1088a-extirq" for LS1088A, LS208xA, LX216xA
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > Signed-off-by: Biwen Li <biwen.li@nxp.com>
> > ---
> > Change in v2:
> >       - add despcription of bit reverse
> >       - update copyright
> >
> >  drivers/irqchip/irq-ls-extirq.c | 10 +++++++++-
> >  1 file changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/irqchip/irq-ls-extirq.c
> > b/drivers/irqchip/irq-ls-extirq.c index 4d1179fed77c..9587bc2607fc
> > 100644
> > --- a/drivers/irqchip/irq-ls-extirq.c
> > +++ b/drivers/irqchip/irq-ls-extirq.c
> > @@ -1,5 +1,8 @@
> >  // SPDX-License-Identifier: GPL-2.0
> > -
> > +/*
> > + * Author: Rasmus Villemoes <linux@rasmusvillemoes.dk>
> 
> If I wanted my name splattered all over the files I touch or add, I'd add it myself,
> TYVM. The git history is plenty fine for recording authorship as far as I'm
> concerned, and I absolutely abhor having to skip over any kind of legalese
> boilerplate when opening a file.
Okay, got it. Will drop it in v3. Thanks.
> 
> Rasmus

  reply	other threads:[~2020-10-27  7:48 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-27  4:46 [v2 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Biwen Li
2020-10-27  4:46 ` [v2 02/11] arm64: dts: ls1043a: add DT node for external interrupt lines Biwen Li
2020-10-27  4:46 ` [v2 03/11] arm64: dts: ls1046a: " Biwen Li
2020-10-27  4:46 ` [v2 04/11] arm64: dts: ls1046ardb: Add interrupt line for RTC node Biwen Li
2020-10-27  4:46 ` [v2 05/11] arm64: dts: ls1088a: add DT node for external interrupt lines Biwen Li
2020-10-27  4:46 ` [v2 06/11] arm64: dts: ls1088ardb: fix interrupt line for RTC node Biwen Li
2020-10-27  4:46 ` [v2 07/11] arm64: dts: ls208xa: add DT node for external interrupt lines Biwen Li
2020-10-27  4:46 ` [v2 08/11] arm64: dts: ls208xa-rdb: add interrupt line for RTC node Biwen Li
2020-10-27  4:46 ` [v2 09/11] arm64: dts: lx2160a: add DT node for external interrupt lines Biwen Li
2020-10-27  4:46 ` [v2 10/11] arm64: dts: lx2160ardb: fix interrupt line for RTC node Biwen Li
2020-10-27  4:46 ` [v2 11/11] dt-bindings: interrupt-controller: update bindings for supporting more SoCs Biwen Li
2020-10-27  7:40 ` [v2 01/11] irqchip: ls-extirq: Add LS1043A, LS1088A external interrupt Rasmus Villemoes
2020-10-27  7:48   ` Biwen Li [this message]
2020-10-27 21:30     ` [EXT] " Leo Li
2020-11-02  6:14       ` Biwen Li (OSS)
2020-11-02 21:22         ` Leo Li
2020-11-03  8:02           ` Rasmus Villemoes
2020-11-05 23:03             ` Leo Li
2020-11-24  1:33               ` Li Yang
2020-11-30  1:38                 ` Biwen Li (OSS)
2020-10-27  9:33 ` Marc Zyngier
2020-10-27 10:35   ` Biwen Li (OSS)
2020-10-27 10:43     ` Marc Zyngier
2020-10-27 10:55       ` Biwen Li (OSS)

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