RE: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM

From: Peng Fan <peng.fan@nxp.com>
To: Marek Vasut <marex@denx.de>, Adam Ford <aford173@gmail.com>,
	"Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: "Rob Herring" <robh+dt@kernel.org>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Sascha Hauer" <kernel@pengutronix.de>,
	"Fabio Estevam" <festevam@gmail.com>,
	dl-linux-imx <linux-imx@nxp.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Guido Günther" <agx@sigxcpu.org>,
	"Andrey Smirnov" <andrew.smirnov@gmail.com>,
	devicetree <devicetree@vger.kernel.org>,
	arm-soc <linux-arm-kernel@lists.infradead.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	"Jacky Bai" <ping.bai@nxp.com>,
	"Schrempf Frieder" <frieder.schrempf@kontron.de>,
	"Abel Vesa" <abel.vesa@nxp.com>
Subject: RE: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
Date: Mon, 28 Jun 2021 11:14:35 +0000	[thread overview]
Message-ID: <DB6PR0402MB27603801C9017F05393DDFAB88039@DB6PR0402MB2760.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <2c39672b-780a-8e33-038e-0856e32ede7a@denx.de>

> Subject: Re: [PATCH V7 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
> 
> On 6/14/21 8:07 PM, Adam Ford wrote:
> > On Sat, Jun 12, 2021 at 7:58 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>
> wrote:
> >>
> >> From: Peng Fan <peng.fan@nxp.com>
> >>
> >> The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> >> that support in this driver.
> >>
> >> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> >> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >
> > Maybe my TF-A is too old, but I am not able to wake the device from
> > suspend-to-ram with this series.  I used the device tree from [1] to
> > enable both the GPCv2 and the blk-ctl stuff.
> >
> > [1] -
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fpatch%2F20210604111
> 005
> > .6804-1-peng.fan%40oss.nxp.com%2F&amp;data=04%7C01%7Cpeng.fan%4
> 0nxp.co
> >
> m%7Ca4c06cfdf6314633c7c708d93a23cff0%7C686ea1d3bc2b4c6fa92cd99c
> 5c30163
> >
> 5%7C0%7C0%7C637604747755701757%7CUnknown%7CTWFpbGZsb3d8eyJ
> WIjoiMC4wLjA
> >
> wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;s
> data=0
> > pDwVtfizZ7mZh9pSfy0bSbffOxP90AnaQrZ8i8cNv0%3D&amp;reserved=0
> >
> > I based both off Shawn's for-next branch.
> 
> I also ran into issues with this, although it could also be related to GPCv2. On
> MX8MM , the system sometimes hangs when bringing up the GPCv2 power
> domain 6 (VPUMIX). It seems that the GPCv2 driver sets
> GPC_PU_PGC_SW_PUP_REQ register to 0x100 to bring up the VPUMIX and
> the bit never self-clears. After that, it seems the entire GPC locks up.
> Have you ever seen that kind of behavior ?

Do you have clk enabled for vpumix? Is this issue happends every time? Or hard
to reproduce?

Thanks,
Peng.