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received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: KvcS+SK9fBsGUkA03GqQ4kttRrktdYlYztF+pRAzX6Zkp2QvRIe4OW6ilKSibnNqJlLGlc/PPgeeV9MppK5uEWeVIYZ1G9X6GtYgTcGLjfoFSjM+g4uZ2CjE4YwBGPpeqQy5YzqoV+1LpRPr1I12J8EzMhn1/2C/GxYdZTDOpkckM0h/ImpUmNeehmJigcWVXlf2mQhB5vog0Z8FtRrQARGTTwvHq6u38reCxTrxSqS8O3uwucoQLPCbTkskl76X3UQ1Tij4CAgW3gILQUNrMTaSEkOEWUIfpsy5EanK+UWoH7uT7QiIplmEKUlgLMsV6+wcumsgpdq34XkbshnTQewR3nQc8CM9bx/OZrnJ5IPCCOlTHZCt8Z68HILGEUm54kNrS5rDVcwQsmpmKJIl8iLO9qygjquCsOyBpXZ0tR4= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 56878908-200a-4563-5c81-08d72a05e855 X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Aug 2019 09:15:15.6236 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: R9grCI5sOA7WgQk1dGVps6/SfobpnhQ6572Ssb3HAUx15okBkagokhnv0Se7fFQjRdwKNrUJoEWNQ+oDXkGutQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR04MB5243 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Ashish Kumar > Sent: Tuesday, August 13, 2019 4:08 PM > To: tudor.ambarus@microchip.com; marek.vasut@gmail.com; > dwmw2@infradead.org; computersforpeace@gmail.com; > miquel.raynal@bootlin.com; richard@nod.at; vigneshr@ti.com; linux- > mtd@lists.infradead.org > Cc: linux-kernel@vger.kernel.org; Ashish Kumar ; > Kuldeep Singh ; Ashish Kumar > > Subject: [Patch v3] drivers: mtd: spi-nor: Add flash property for mt25qu5= 12a > and mt35xu02g Hi Vignesh, Tudor Ambarus, =20 Could you please update, if there are any further comments on this patch. Regards Ashish=20 >=20 > mt25qu512a is rebranded after its spinoff from STM, so it is different on= ly in > term of operating frequency, initial JEDEC id is same as that of n25q512a= . In > order to avoid any confussion with respect to name new entry is added. > This flash is tested for Single I/O and QUAD I/O mode on LS1046FRWY. >=20 > mt35xu02g is Octal flash supporting Single I/O and QCTAL I/O and it has b= een > tested on LS1028ARDB >=20 > Signed-off-by: Kuldeep Singh > Signed-off-by: Ashish Kumar > --- > v3: > -Reword commits msg > -rebase to top of mtd-linux spi-nor/next > v2: > Incorporate review comments from Vignesh >=20 > drivers/mtd/spi-nor/spi-nor.c | 9 +++++++++ > 1 file changed, 9 insertions(+) >=20 > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.= c > index 03cc788..97d3de8 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -1988,6 +1988,12 @@ static const struct flash_info spi_nor_ids[] =3D { > { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | > SPI_NOR_QUAD_READ) }, > { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | > SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, > { "n25q256ax1", INFO(0x20bb19, 0, 64 * 1024, 512, SECT_4K | > SPI_NOR_QUAD_READ) }, > + > + /* Micron */ > + { "mt25qu512a", INFO6(0x20bb20, 0x104400, 64 * 1024, 1024, > SECT_4K | > + USE_FSR | SPI_NOR_DUAL_READ | > + SPI_NOR_QUAD_READ | > SPI_NOR_4B_OPCODES) }, > + > { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | > USE_FSR | SPI_NOR_QUAD_READ) }, > { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | > USE_FSR | SPI_NOR_QUAD_READ) }, > { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR > | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, > @@ -2003,6 +2009,9 @@ static const struct flash_info spi_nor_ids[] =3D { > SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | > SPI_NOR_4B_OPCODES) > }, > + { "mt35xu02g", INFO(0x2c5b1c, 0, 128 * 1024, 2048, > + SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | > + SPI_NOR_4B_OPCODES) }, >=20 > /* PMC */ > { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, > -- > 2.7.4