RE: [EXT] Re: [v2 2/2] arm64: dts: ls1028a: Update the DT node definition for dpclk

[Wen He <wen.he_1@nxp.com>]

> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: 2019年10月7日 20:35
> To: Wen He <wen.he_1@nxp.com>
> Cc: linux-devel@linux.nxdi.nxp.com; Leo Li <leoyang.li@nxp.com>; Rob Herring
> <robh+dt@kernel.org>; Mark Rutland <mark.rutland@arm.com>;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org
> Subject: [EXT] Re: [v2 2/2] arm64: dts: ls1028a: Update the DT node definition
> for dpclk
> 
> 
> On Fri, Sep 20, 2019 at 04:34:19PM +0800, Wen He wrote:
> > Update DT node name clock-controller to clock-display,
> 
> The node name clock-controller is so good, and I do not understand why you
> need to change it.
> 

The node name clock-controller used for the system clockgen and this clock only used for
the Display core. 
To clearly the node, that why I have to use clock-display to instead of the clock-controller

Best Regards,
Wen

> Shawn
> 
> > also change
> > the property #clock-cells value to zero.
> >
> > This update according the feedback of the Display output interface
> > clock driver upstream.
> >
> > Link:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore
> > .kernel.org%2Fpatchwork%2Fpatch%2F1113832%2F&amp;data=02%7C01%
> 7Cwen.he
> >
> _1%40nxp.com%7C61934346fa6646d28bac08d74b22e08c%7C686ea1d3bc2b
> 4c6fa92c
> >
> d99c5c301635%7C0%7C0%7C637060485478218390&amp;sdata=%2FLG2KvA
> LdOGp6T06
> > 2fuKGQXYegswsEOWPAvzWnLkftM%3D&amp;reserved=0
> > Signed-off-by: Wen He <wen.he_1@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > index 51fa8f57fdac..db1e186352d8 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> > @@ -79,10 +79,10 @@
> >               clock-output-names = "phy_27m";
> >       };
> >
> > -     dpclk: clock-controller@f1f0000 {
> > +     dpclk: clock-display@f1f0000 {
> >               compatible = "fsl,ls1028a-plldig";
> >               reg = <0x0 0xf1f0000 0x0 0xffff>;
> > -             #clock-cells = <1>;
> > +             #clock-cells = <0>;
> >               clocks = <&osc_27m>;
> >       };
> >
> > @@ -665,7 +665,7 @@
> >               interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
> >                            <0 223 IRQ_TYPE_LEVEL_HIGH>;
> >               interrupt-names = "DE", "SE";
> > -             clocks = <&dpclk 0>, <&clockgen 2 2>, <&clockgen 2 2>,
> > +             clocks = <&dpclk>, <&clockgen 2 2>, <&clockgen 2 2>,
> >                        <&clockgen 2 2>;
> >               clock-names = "pxlclk", "mclk", "aclk", "pclk";
> >               arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
> > --
> > 2.17.1
> >