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From: "Yuan, Perry" <Perry.Yuan@amd.com>
To: "Limonciello, Mario" <Mario.Limonciello@amd.com>,
	"rafael.j.wysocki@intel.com" <rafael.j.wysocki@intel.com>,
	"Huang, Ray" <Ray.Huang@amd.com>,
	"viresh.kumar@linaro.org" <viresh.kumar@linaro.org>
Cc: "Sharma, Deepak" <Deepak.Sharma@amd.com>,
	"Fontenot, Nathan" <Nathan.Fontenot@amd.com>,
	"Deucher, Alexander" <Alexander.Deucher@amd.com>,
	"Huang, Shimmer" <Shimmer.Huang@amd.com>,
	"Du, Xiaojian" <Xiaojian.Du@amd.com>,
	"Meng, Li (Jassmine)" <Li.Meng@amd.com>,
	"Karny, Wyes" <Wyes.Karny@amd.com>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v4 9/9] Documentation: amd-pstate: add amd pstate driver mode introduction
Date: Fri, 2 Dec 2022 08:20:31 +0000	[thread overview]
Message-ID: <DM4PR12MB5278891B1188E31DB72432FC9C179@DM4PR12MB5278.namprd12.prod.outlook.com> (raw)
In-Reply-To: <76570217-12b0-0501-53b6-45100c3effe1@amd.com>

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[AMD Official Use Only - General]

Hi Mario 

> -----Original Message-----
> From: Limonciello, Mario <Mario.Limonciello@amd.com>
> Sent: Tuesday, November 15, 2022 6:29 AM
> To: Yuan, Perry <Perry.Yuan@amd.com>; rafael.j.wysocki@intel.com; Huang,
> Ray <Ray.Huang@amd.com>; viresh.kumar@linaro.org
> Cc: Sharma, Deepak <Deepak.Sharma@amd.com>; Fontenot, Nathan
> <Nathan.Fontenot@amd.com>; Deucher, Alexander
> <Alexander.Deucher@amd.com>; Huang, Shimmer
> <Shimmer.Huang@amd.com>; Du, Xiaojian <Xiaojian.Du@amd.com>; Meng,
> Li (Jassmine) <Li.Meng@amd.com>; Karny, Wyes <Wyes.Karny@amd.com>;
> linux-pm@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v4 9/9] Documentation: amd-pstate: add amd pstate
> driver mode introduction
> 
> Please run this through a spell checker before v5.
> 
> On 11/10/2022 11:58, Perry Yuan wrote:
> > Introduce ``amd-pstate`` CPPC has two operation modes:
> > * CPPC Autonomous (active) mode
> > * CPPC non-autonomous (passive) mode.
> > active mode and passive mode can be choosed by whith different kernel
> parameters.
> 
> can be chosen by different kernel parameters

Forget to reply this, 
I have fixed the words typo in the  v6.
Thanks for your review. 
Perry. 

> 
> >
> > Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
> > ---
> >   Documentation/admin-guide/pm/amd-pstate.rst | 47
> +++++++++++++++++++--
> >   1 file changed, 43 insertions(+), 4 deletions(-)
> >
> > diff --git a/Documentation/admin-guide/pm/amd-pstate.rst
> > b/Documentation/admin-guide/pm/amd-pstate.rst
> > index e7488891b12f..6ba02a658b31 100644
> > --- a/Documentation/admin-guide/pm/amd-pstate.rst
> > +++ b/Documentation/admin-guide/pm/amd-pstate.rst
> > @@ -302,11 +302,11 @@ efficiency frequency management method on
> AMD processors.
> >   Kernel Module Options for ``amd-pstate``
> >   =========================================
> >
> > -.. _shared_mem:
> > +.. legacy_cppc:
> >
> > -``shared_mem``
> > -Use a module param (shared_mem) to enable related processors
> manually
> > with -**amd_pstate.shared_mem=1**.
> > +``legacy_cppc``
> > +Use a module param (legacy_cppc) to enable related processors
> > +manually with **amd_pstate=legacy_cppc**.
> >   Due to the performance issue on the processors with `Shared Memory
> Support
> >   <perf_cap_>`_, we disable it presently and will re-enable this by default
> >   once we address performance issue with this solution.
> > @@ -321,6 +321,45 @@ If the CPU flags have ``cppc``, then this processor
> supports `Full MSR Support
> >   <perf_cap_>`_. Otherwise, it supports `Shared Memory Support
> <perf_cap_>`_.
> >
> >
> > +AMD Pstae Driver Operation Modes
> 
> Pstate
> 
> > +=================================
> > +
> > +``amd-pstate`` CPPC has two operation modes: CPPC Autonomous(active)
> > +mode and CPPC non-autonomous(passive) mode.
> > +active mode and passive mode can be choosed by whith different kernel
> parameters.
> 
> can be chosen by different kernel parameters
> 
> > +When in Autonomous mode, CPPC ignores requests done in the Desired
> > +Performance Target register and takes into account only the values
> > +set to the Minimum requested performance, Maximum requested
> > +performance, and Energy Performance Preference registers. When
> Autonomous is disabled, it only considers the Desired Performance Target.
> > +
> > +Active Mode
> > +------------
> > +
> > +``amd-pstate-epp``
> > +
> > +This is the low-level firmware control mode which is implemented by
> > +``amd-pstate-epp`` driver with ``amd-pstate=active`` passed to the kernel
> in the command line.
> > +In this mode, ``amd-pstate-epp`` driver provides a hint to the
> > +hardware if software wants to bias toward performance (0x0) or energy
> efficiency (0xff) to the CPPC firmware.
> > +then CPPC power algorithm will calculate the runtime workload and
> > +adjust the realtime cores frequency according to the power supply and
> > +thermal, core voltage and some other hardware conditions.
> > +
> > +Passive Mode
> > +------------
> > +
> > +``amd-pstate``
> > +
> > +It will be enabled if the ``amd_pstate=passive`` is passed to the kernel in
> the command line.
> > +In this mode, ``amd-pstate``driver software specifies a desired QoS
> > +target in the CPPC performance scale as a relative number. This can
> > +be expressed as percentage of nominal performance (infrastructure
> > +max). Below the nominal sustained performance level, desired
> > +performance expresses the average performance level of the processor
> > +subject to the Performance Reduction Tolerance register. Above the
> > +nominal performance level, processor must provide at least nominal
> performance requested and go higher if current operating conditions allow.
> > +
> > +
> >   ``cpupower`` tool support for ``amd-pstate``
> >   ===============================================
> >

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      reply	other threads:[~2022-12-02  8:26 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-10 17:58 [PATCH v4 0/9] Implement AMD Pstate EPP Driver Perry Yuan
2022-11-10 17:58 ` [PATCH v4 1/9] ACPI: CPPC: Add AMD pstate energy performance preference cppc control Perry Yuan
2022-11-10 17:58 ` [PATCH v4 2/9] Documentation: amd-pstate: add EPP profiles introduction Perry Yuan
2022-11-10 17:58 ` [PATCH v4 3/9] cpufreq: amd-pstate: change amd-pstate driver to be built-in type Perry Yuan
2022-11-14 22:46   ` Limonciello, Mario
2022-11-15  2:02     ` Yuan, Perry
2022-11-10 17:58 ` [PATCH v4 4/9] cpufreq: amd_pstate: implement Pstate EPP support for the AMD processors Perry Yuan
2022-11-14 22:40   ` Limonciello, Mario
2022-11-30 17:12     ` Yuan, Perry
2022-12-02  8:18     ` Yuan, Perry
2022-11-17 14:02   ` Wyes Karny
2022-11-18  3:54     ` Yuan, Perry
2022-11-10 17:58 ` [PATCH v4 5/9] cpufreq: amd_pstate: implement amd pstate cpu online and offline callback Perry Yuan
2022-11-10 17:58 ` [PATCH v4 6/9] cpufreq: amd-pstate: implement suspend and resume callbacks Perry Yuan
2022-11-10 17:58 ` [PATCH v4 7/9] cpufreq: amd-pstate: add frequency dynamic boost sysfs control Perry Yuan
2022-11-14 22:30   ` Limonciello, Mario
2022-11-30 17:13     ` Yuan, Perry
2022-11-10 17:58 ` [PATCH v4 8/9] cpufreq: amd_pstate: add driver working mode status sysfs entry Perry Yuan
2022-11-14 22:30   ` Limonciello, Mario
2022-11-30 17:13     ` Yuan, Perry
2022-11-10 17:58 ` [PATCH v4 9/9] Documentation: amd-pstate: add amd pstate driver mode introduction Perry Yuan
2022-11-14 22:29   ` Limonciello, Mario
2022-12-02  8:20     ` Yuan, Perry [this message]

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