From: Gustavo Pimentel <Gustavo.Pimentel@synopsys.com>
To: Vidya Sagar <vidyas@nvidia.com>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"amurray@thegoodpenguin.co.uk" <amurray@thegoodpenguin.co.uk>,
"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
Joao Pinto <Joao.Pinto@synopsys.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>,
Thierry Reding <treding@nvidia.com>,
Krishna Thota <kthota@nvidia.com>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: Query regarding the use of pcie-designware-plat.c file
Date: Tue, 8 Jun 2021 21:17:05 +0000 [thread overview]
Message-ID: <DM5PR12MB18351813A8F94B0D18E6B505DA379@DM5PR12MB1835.namprd12.prod.outlook.com> (raw)
In-Reply-To: <34650ed1-6567-3c8f-fe29-8816f0fd74f2@nvidia.com>
Hi Vidya,
The pcie-designware-plat.c is the driver for the Synopsys PCIe RC IP
prototype.
-Gustavo
On Tue, Jun 8, 2021 at 20:22:37, Vidya Sagar <vidyas@nvidia.com> wrote:
> Hi,
> I would like to know what is the use of pcie-designware-plat.c file.
> This looks like a skeleton file and can't really work with any specific
> hardware as such.
> Some context for this mail thread is, if the config CONFIG_PCIE_DW_PLAT
> is enabled in a system where a Synopsys DesignWare IP based PCIe
> controller is present and its configuration is enabled (Ex:- Tegra194
> system with CONFIG_PCIE_TEGRA194_HOST enabled), then, it can so happen
> that the probe of pcie-designware-plat.c called first (because all DWC
> based PCIe controller nodes have "snps,dw-pcie" compatibility string)
> and can crash the system.
> One solution to this issue is to remove the "snps,dw-pcie" from the
> compatibility string (as was done through the commit f9f711efd441
> ("arm64: tegra: Fix Tegra194 PCIe compatible string") but it seems like
> a localized fix for Tegra194 where the issue potentially is global, as
> in, the crash can happen on any platform.
> So, wondering if the config option CONFIG_PCIE_DW_PLAT can be removed
> altogether for pcie-designware-plat.c?
>
> Thanks,
> Vidya Sagar
next prev parent reply other threads:[~2021-06-08 21:17 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-08 19:22 Query regarding the use of pcie-designware-plat.c file Vidya Sagar
2021-06-08 21:17 ` Gustavo Pimentel [this message]
2021-06-09 5:26 ` Vidya Sagar
2021-06-09 9:49 ` Thierry Reding
2021-06-15 3:28 ` Vidya Sagar
2021-06-09 16:30 ` Bjorn Helgaas
2021-06-09 16:54 ` Jon Hunter
2021-06-15 19:42 ` Bjorn Helgaas
2021-06-15 21:05 ` Rob Herring
2021-06-16 7:54 ` Jon Hunter
2021-06-20 13:35 ` Vidya Sagar
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