From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753867AbeB0Pdt (ORCPT ); Tue, 27 Feb 2018 10:33:49 -0500 Received: from mail-cys01nam02on0083.outbound.protection.outlook.com ([104.47.37.83]:32109 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753266AbeB0Pdr (ORCPT ); Tue, 27 Feb 2018 10:33:47 -0500 From: "Ghannam, Yazen" To: Borislav Petkov CC: "linux-efi@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "ard.biesheuvel@linaro.org" , "x86@kernel.org" Subject: RE: [PATCH v2 5/8] efi: Decode IA32/X64 Cache, TLB, and Bus Check structures Thread-Topic: [PATCH v2 5/8] efi: Decode IA32/X64 Cache, TLB, and Bus Check structures Thread-Index: AQHTrzm0GBA0EHUlaEmx0Hbntxa59aO4WewAgAAHf2A= Date: Tue, 27 Feb 2018 15:33:44 +0000 Message-ID: References: <20180226193904.20532-1-Yazen.Ghannam@amd.com> <20180226193904.20532-6-Yazen.Ghannam@amd.com> <20180227150356.GH26382@pd.tnic> In-Reply-To: <20180227150356.GH26382@pd.tnic> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Yazen.Ghannam@amd.com; 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x-microsoft-antispam-message-info: OFgqkGgbPrvkD6VbmdRwqLHcodF/YJx18OVbPI/o22fRs3WfRjdkM9Q9KBnx4w5ju59eKwTMWq5JjWzM8GhY7elb/cBOwq1cLJLZy93shzn5p+lRWo9OwS2fnLDc51IYvsr9Exl5glboGGXOv34Gnw6MolVxPpK+/7abiGd2HZ4= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8317d07e-4836-4c0f-a886-08d57df77d04 X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Feb 2018 15:33:44.9082 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB2582 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id w1RFY4eJ015720 > -----Original Message----- > From: Borislav Petkov [mailto:bp@suse.de] > Sent: Tuesday, February 27, 2018 10:04 AM > To: Ghannam, Yazen > Cc: linux-efi@vger.kernel.org; linux-kernel@vger.kernel.org; > ard.biesheuvel@linaro.org; x86@kernel.org > Subject: Re: [PATCH v2 5/8] efi: Decode IA32/X64 Cache, TLB, and Bus Check > structures > > On Mon, Feb 26, 2018 at 01:39:01PM -0600, Yazen Ghannam wrote: > > +static void print_err_info(const char *pfx, u8 err_type, u64 check) > > +{ > > + u16 validation_bits = CHECK_VALID_BITS(check); > > + > > + printk("%sValidation Bits: 0x%04x\n", pfx, validation_bits); > > + > > + if (err_type == ERR_TYPE_MS) > > + return; > > + > > + if (validation_bits & CHECK_VALID_TRANS_TYPE) { > > + u8 trans_type = CHECK_TRANS_TYPE(check); > > + > > + printk("%sTransaction Type: %u, %s\n", pfx, trans_type, > > + trans_type < ARRAY_SIZE(ia_check_trans_type_strs) ? > > + ia_check_trans_type_strs[trans_type] : "unknown"); > > + } > > + > > + if (validation_bits & CHECK_VALID_OPERATION) { > > + u8 op = CHECK_OPERATION(check); > > + > > + /* > > + * CACHE has more operation types than TLB or BUS, though > the > > + * name and the order are the same. > > + */ > > + u8 max_ops = (err_type == ERR_TYPE_CACHE) ? 9 : 7; > > + > > + printk("%sOperation: %u, %s\n", pfx, op, > > + op < max_ops ? ia_check_op_strs[op] : "unknown"); > > + } > > + > > + if (validation_bits & CHECK_VALID_LEVEL) > > + printk("%sLevel: %llu\n", pfx, CHECK_LEVEL(check)); > > + > > + if (validation_bits & CHECK_VALID_PCC) > > + print_bool("Processor Context Corrupt", pfx, check, > CHECK_PCC); > > I think we want to print PCC here unconditionally and say: > > PCC: (yes|no|invalid) > > I don't think the absence of PCC in the error record is a good enough > hint that the PCC field is invalid. > > Ditto for the rest and transaction type above too. I think it would be > much easier if we have fixed fields error record. > I agree which is why I've included the Validation Bits. A user can then check the Validation Bits for any field that is of interest but missing. Thanks, Yazen